BSP Manual - phyCORE-i.MX 8M Plus (L-1017e.A1)

Table of Contents

L-1017e.A1 i.MX 8M Plus BSP Manual
Document TitleBSP Manual - phyCORE-i.MX 8M Plus (L-1017e.A1)
Document TypeBSP Manual
Article NumberL-1017e.A1
Yocto ManualL-813e.A10 Yocto Reference Manual
Release Date07.07.2021
Is Branch ofBSP Manual - phyCORE-i.MX 8M Plus (L-1017e.Ax) Head

Yocto Introduction

Please read the L-813e.A10 Yocto Reference Manual for a better understanding of Yocto and this BSP. Furthermore, the meta-yogurt layer cannot be used for the alpha release. Look at the NXP documentation i.MX Yocto Project User's Guide for more information.

PHYTEC Documentation

PHYTEC provides a variety of hardware and software documentation for all of our products. This includes any or all of the following:

  • QS Guide: A short guide on how to set up and boot a phyCORE board along with brief information on building a BSP, the device tree, and accessing peripherals.
  • Hardware Manual:  A detailed description of the System on Module and accompanying carrier board. 
  • Yocto Guide:  A comprehensive guide for the Yocto version the phyCORE uses. This guide contains an overview of Yocto; introducing, installing, and customizing the PHYTEC BSP; how to work with programs like Poky and Bitbake; and much more.
  • BSP Manual:  A manual specific to the BSP version of the phyCORE. Information such as how to build the BSP, booting, updating software, device tree, and accessing peripherals can be found here.
  • Development Environment Guide:  This guide shows how to work with the Virtual Machine (VM) Host PHYTEC has developed and prepared to run various Development Environments. There are detailed step-by-step instructions for Eclipse and Qt Creator, which are included in the VM. There are instructions for running demo projects for these programs on a phyCORE product as well. Information on how to build a Linux host PC yourself is also a part of this guide.
  • Pinout Table:  phyCORE SOMs have an accompanying pin table (in Excel format). This table will show the complete default signal path, from processor to carrier board. The default device tree muxing option will also be included. This gives a developer all the information needed in one location to make muxing changes and design options when developing a specialized carrier board or adapting a PHYTEC phyCORE SOM to an application. 

On top of these standard manuals and guides, PHYTEC will also provide Product Change Notifications, Application Notes, and Technical Notes. These will be done on a case-by-case basis. Most of the documentation can be found in the applicable download page of our products.

BSP Introduction

Supported Hardware

The phyBOARD-Pollux with 2GB RAM  is supported. Visit our web page athttps://www.phytec.de/produkte/system-on-modules/phycore-imx-8m-plus/#downloads/. Click the corresponding BSP release and look for the article number of your module in the column "Article Number". Finally, look for the correct machine name in the corresponding cell under "Machine Name".

Building the BSP

This section will guide you through the general build process of the i.MX 8M Plus BSP using the phyLinux script. If you want to use our software without phyLinux and the Repo tool managed environment instead, you can find all Git repositories on:

git://git.phytec.de  

Used u-boot repository:

git://git.phytec.de/u-boot-imx

Our u-boot is based on the u-boot-imx and adds only a few patches which will be sent upstream in future updates. Used Linux kernel repository:

git://git.phytec.de/linux-imx

Our i.MX 8M Plus kernel is based on the linux-imx kernel. To find out which tag is used for a specific board, have a look at your checked out BSP source folder:

meta-phytec/recipes-bsp/u-boot/u-boot-imx_*.bb 
meta-phytec/dynamic-layers/freescale-layer/recipes-kernel/linux/linux-imx_*.bb

Get the BSP

  • Create a fresh project directory:
host$ mkdir ~/yocto
  • Download and run the phyLinux script on the manifest file:
host$ cd ~/yocto
host$ wget https://download.phytec.de/Software/Linux/Yocto/Tools/phyLinux
host$ chmod +x phyLinux
host$ ./phyLinux init

Basic Set-Up

There are a few important steps that have to be done before the main build process.

Finding the Right Software Platform

The i.MX 8M Plus BSP is planned as a unified BSP, which means in the future it will support a set of different PHYTEC carrier boards (CB) with different Systems on Module (SOMs).

#@TYPE: Machine
#@NAME: phyboard-pollux-imx8mp-2
#@DESCRIPTION: PHYTEC phyBOARD-Pollux i.MX8M Plus
#@ARTICLENUMBERS: PB-02820.A1

Software Platform Selection

  • To set the correct SoC, BSP version, and platform:
host$ ./phyLinux init
  • It is also possible to pass this information directly using command line parameters:

MACHINE=phyboard-pollux-imx8mp-2 ./phyLinux init -p imx8mp -r PD-BSP-Yocto-FSL-i.MX8MP-PD21.1.1

Please read Initialization for more information.

Starting the Build Process

Refer to Start the Build.

BSP Images

All images generated by Bitbake are deployed to ~/yocto/build/deploy/images/phyboard-pollux-imx8mp-2/.

The following list shows for example all files generated for the i.MX 8M Plus phyboard-pollux-imx8mp-2 machine:

  • U-Boot: u-boot.bin
  • U-Boot-SPL: u-boot-spl.bin
  • imx-boot: imx-boot
  • lpddr4 binary files: lpddr4_pmu_train_1d_dmem_201904.bin, lpddr4_pmu_train_1d_imem_201904.bin, lpddr4_pmu_train_2d_dmem_201904.bin, lpddr4_pmu_train_2d_imem_201904.bin
  • Kernel: Image
  • Kernel device tree file: oftree
  • Root filesystem: phytec-qt5demo-image-phyboard-pollux-imx8mp-2.tar.gz, phytec-qt5demo-image-phyboard-pollux-imx8mp-2.manifest
  • SD card image:phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard

Tip

The default Linux image phytec-qt5demo-image will start a Wayland Weston, even if there is no display connected.

System Booting

The default boot source for the i.MX 8M Plus module phyBOARD-Pollux is the eMMC. But for the PD21.1.1 release, the BSP is available on SD-Card. Information on boot configurations can be found in our hardware manual here: Boot Switch (S3)

To update the software on eMMC, see Updating Software.

Booting from eMMC

To boot from eMMC, make sure that the BSP image is flashed correctly to the flash. On DIP switch S1, all positions need to be set to OFF. The location of the DIP switch S1 can be found on phyBOARD-Pollux Components - Front.

  • The following boot sequence can be seen on at serial console interface:
U-Boot SPL 2020.04 (Jun 02 2021 - 21:33:10 +0000)
SoM: PCM-070-0F3243I.A1 PCB rev: 1a
DDRINFO: start DRAM init
DDRINFO: DRAM rate 4000MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
NOTICE:  BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-0-g2a2678646-dirty
NOTICE:  BL31: Built : 22:01:16, Apr 30 2021


U-Boot 2020.04 (Jun 02 2021 - 21:33:10 +0000)

CPU:   i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 55C
Reset cause: POR
Model: PHYTEC phyCORE-i.MX8MP
       Watchdog enabled
DRAM:  2 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Loading Environment from MMC... *** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial

 BuildInfo:
  - ATF 2a26786
  - U-Boot 2020.04

Net:   
Warning: ethernet@30be0000 (eth0) using random MAC address - d2:e5:04:8d:e7:fd
eth0: ethernet@30be0000
Normal Boot
Hit any key to stop autoboot:  0 
u-boot=> 

Booting from SD Card

Booting from an SD card is useful in several situations, e.g. if the board does not start anymore due to a damaged bootloader. To boot from an SD card, switch S1 POS1 has to be set to ON.

There are two ways to create a bootable SD card. You can either use:
- a single prebuild SD card image, or
- the four individual images (imx-boot-, kernel- and device tree image, and root filesystem)

Single, Prebuild SD Card Image

The first possibility is to use the SD card image built by Bitbake, a tool integrated into Yocto. This image has the ending *.sdcard and can be found under build/deploy/images/<MACHINE>/<IMAGENAME>-<MACHINE>.sdcard. It contains all BSP files in several, correctly preformatted partitions and can be copied to the SD card easily using the single Linux command dd.

You can also find ready-to-use *.sdcard images on our Download server.

Tip

The created file phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard is only a link to a file like phytec-qt5demo-image-phyboard-pollux-imx8mp-2-<BUILD-TIME>.rootfs.sdcard.

Warning

To create your bootable SD card with the dd command, you must have root privileges. Because of this, you must be very careful when selecting the destination device for the dd command! All files on the selected destination device will be erased immediately without any further query! Consequently, having selected the wrong device can also erase your hard drive!

To create your bootable SD card, you must first find out the correct device name of your SD card and possible partitions. Then unmount the partitions before you start copying the image to the SD card.

  • In order to get the correct device name, first remove your SD card and execute ls /dev.
  • Now insert your SD card and execute ls /dev again.
  • Compare the two outputs to find the new device name(s) listed in the second output. These are the device names of the SD card (device and partitions if the SD card is formatted).
  • In order to verify the device names found, execute the command dmesg. Within the last lines of its output, you should also find the device names, for example, sde (depending on your system).

Now that you have the device name /dev/<your_device> (e.g. /dev/sde), you can see the partitions which must be unmounted if the SD card is formatted. In this case, you will also find /dev/<your_device> with an appended number (e.g. /dev/sde1) in the output. These represent the partition(s) that need to be unmounted.

  • Unmount all partitions:
host$ umount /dev/<your_device><number>
  • After having unmounted all devices with an appended number (<your_device><number>), you can create your bootable SD card:
host$ sudo dd if=<IMAGENAME>-<MACHINE>.sdcard of=/dev/<your_device> bs=1M conv=fsync status=progress
  • If you use the image file created by Bitbake instead:
host$ sudo dd if=<IMAGENAME>-<MACHINE>-<BUILD-TIME>.rootfs.sdcard of=/dev/<your_device> bs=1M conv=fsync status=progress

Using the device name (<your_device>) without appended number (e.g. sde) which stands for the whole device. The parameter conv=fsync forces a sync operation on the device before dd returns. This ensures that all blocks are written to the SD card and are not still in memory. The parameter status=progress will print out information on how much data is and still has to be copied until it is finished.

<BUILD-TIME> has the format: YYYYMMDDHHMMSS

example: 
    Date = 22.05.2021
    Time = 11:06:36
    <BUILD-TIME> = 20210522110636

Four Individual Images (imx-boot, kernel image, device tree image, root filesystem)

Option two uses imx-boot and an image (a kernel and device tree image together with the root filesystem) to manually create a bootable SD card.

For this method, a new card must be set up with 2 partitions and 8 MB of free space at the beginning of the card. Use the following procedure with fdisk under Linux:

  • Create a new FAT partition with partition id C. When creating the new partition, you must leave 8 MB of free space at the beginning of the card. When you go through the process of creating a new partition, fdisk lets you specify where the first sector starts. During this process, fdisk will tell you where the first sector on the disk begins. For example, if the first sector begins at 1000 and each sector is 512 bytes, then 8 MB / 512 bytes = 16384 sectors. This means your first sector should begin at 17384 to leave 8 MB of free space. The size of the FAT partition needs only be big enough to hold the zImage, which is only a few megabytes. To be safe, we recommend a size of 64 MB.
  • Create a new Linux partition with partition id 83. Make sure you start this partition after the last sector of partition 1! By default, fdisk will try to use the first partition available on the disk, which in this example is 1000. However, this is our reserved space! You must use the remaining portion of the card for this partition.
  • Write the new partition to the SD card and exit fdisk.

Example:

  • Type:
host$ sudo fdisk -l /dev/sdc
  • You will receive:
Disk /dev/sdc: 4025 MB, 4025483264 bytes
4 heads, 32 sectors/track, 61424 cylinders, total 7862272 sectors
Units = sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disk identifier: 0x26edf128
 
Device Boot      Start         End      Blocks   Id  System
/dev/sdc1         8192       24575        8192    c  W95 FAT32 (LBA)
/dev/sdc2        24576      655359      315392   83  Linux
  • Remove and reinsert the card. Otherwise, Linux will not recognize the new partitions created in the previous step.
  • Create a file system on the partitions (replace sde with your device):
host$ sudo mkfs.vfat /dev/sde1
host$ sudo mkfs.ext4 -L "rootfs" /dev/sde2

Now, the images need to be copied to the SD card.

  • Write the bootloader in front of the first partition (replace sde with your device):
host$ dd if=imx-boot of=/dev/sde bs=1k seek=32 conv=fsync
  • Mount the first partition (vfat) and copy the linuximage and oftree file to it:
host$ sudo mount /dev/sd<X>1 /mnt

Warning

Make sure that the images are named exactly as previously mentioned as the bootloader expects them to be named as such.

  • In case you want to boot the whole Linux from the SD card, mount the ext4 partition as well.
  • Then untar <IMAGENAME>-<MACHINE>.tar.gz rootfs image to it:
host$ sudo mount /dev/sd<X>2 /media
host$ sudo tar jxf <IMAGENAME>-<MACHINE>.tar.gz -C /media/
  • Do not forget to properly unmount the SD card:
host$ sudo umount /media

Booting the Kernel from a Network

Booting from a network means loading the kernel over TFTP and the root filesystem over NFS. The bootloader itself must already be loaded from another boot device that is available.

Host Preparation Developments 

On the development host, a TFTP server must be installed and configured. The following tools will be needed to boot the Kernel from Ethernet:

  • A TFTP server

For Ubuntu, install:

host$ sudo apt-get install tftpd-hpa xinetd

After the installation, there are two ways to configure the TFTP server.

TFTP Server Setup

  1. As a stand-alone daemon
  2. Controlled and handled by xinetd
  • First, create a directory to store the TFTP files:
host$ sudo mkdir /tftpboot
host$ sudo chmod -R 777 /tftpboot
host$ sudo chown -R nobody /tftpboot

Then copy your BSP image files to this directory. You also need to configure a static IP address for the appropriate interface. The default IP address of the PHYTEC evaluation boards is 192.168.3.11. Setting a host address 192.168.3.10 with netmask 255.255.255.0 is a good choice.

host$ ifconfig eth1

You will receive:

eth1     Link encap:Ethernet   HWadr 00:11:6b:98:e3:47
         inet addr:192.168.3.10 Bcast:192.168.3.255 Mask:255.255.255.0

TFTP as a Stand-alone Daemon

  • Create or edit /etc/default/tftpd-hpa:
# /etc/default/tftpd-hpa
 
TFTP_USERNAME="tftp"
TFTP_DIRECTORY="/tftpboot"
TFTP_ADDRESS=":69"
TFTP_OPTIONS="-s -c"
  • Set TFTP_DIRECTORY to your TFTP server root directory
  • Set TFTP_ADDRESS to the host address the server is listening to (set to 0.0.0.0:69 to listen to all local IPs)
  • Set TFTP_OPTIONS, the following command shows the available options:
host$ man tftpd
  • Restart the services to pick up the configuration changes:
host$ sudo service tftpd-hpa restart
  • Now connect the ethernet port of the board to your host system, configure the board to network boot, and start it.

Usually, TFTP servers fetch files from the /tftpboot directory. If you built your own images, please copy them from the BSP’s build directory to the /tftpboot directory.

We also need a network connection between the embedded board and the TFTP server. The server should be set to IP 192.168.3.10 and netmask 255.255.255.0.

NFS Server Setup

After the installation of the TFTP server, an NFS server needs to be installed, too.

host$ sudo apt-get install nfs-kernel-server

The NFS server is not restricted to a certain file system location, so all we have to do on most distributions is modify the file /etc/exports and export our root filesystem to the embedded network. In this example file, the whole directory is exported and the "lab network" address of the development host is 192.168.3.10. The IP address has to be adapted to the local needs:

/home/<user>/<rootfspath> 192.168.3.11/255.255.255.0(rw,no_root_squash,sync,no_subtree_check)

<user> must be replaced with your home directory name.
<rootfspath> can be set to a folder that contains a rootfs tar.gz image extracted with sudo.

Now the NFS-Server has to read the /etc/expots file again:

host$ sudo exportfs -ra

Embedded Board Preparations

  • To find the Ethernet settings in the target bootloader:
u-boot=> printenv ipaddr serverip netmask nfsroot netargs netboot

With your development host set to IP 192.168.3.10 and netmask 255.255.255.0, the target should return:

ipaddr=192.168.3.11
serverip=192.168.3.10
netmask=255.225.255.0
nfsroot=/nfs
netargs=setenv bootargs console=${console} root=/dev/nfs ip=${nfsip} nfsroot=${serverip}:${nfsroot},v3,tcp
netboot=echo Booting from net ...; if test ${ip_dyn} = yes; then setenv nfsip dhcp; setenv get_cmd dhcp; else setenv nfsip ${ipaddr}:${serverip}::${netmask}::eth0:on; setenv get_cmd tftp; fi; run netargs; ${get_cmd} ${loadaddr} ${image}; if ${get_cmd} ${fdt_addr} ${fdt_file}; then booti ${loadaddr} - ${fdt_addr}; else echo WARN: Cannot load the DT; fi;

  • If you need to make any changes:
u-boot=> setenv <parameter> <value>
  • <parameter> should be one of ipaddr, netmask, gateway, or severip.
  • <value> will be the actual value of the chosen parameter.
  • Make your changes and hit 'Enter'.

The changes you made are temporary for now. To save these:

u-boot=> saveenv

Here you can also change the IP address to DHCP instead of using a static one.

  • Configure:
u-boot=> setenv ip_dyn yes
  • Set up paths for TFTP and NFS. A modification could look like this:
u-boot=> setenv nfsroot /home/user/nfssrc

Please note that these modifications will only affect the bootloader settings.

Booting from an Embedded Board

  • To boot from the network, call:
u-boot=> run netboot

Booting from SPI NOR Flash

The phyCORE-i.MX8MP modules are optionally equipped with SPI NOR Flash. To boot from SPI Flash, set SwitchS3 POS3 ON and POS1, POS2, and POS4 OFF. The SPI Flash is usually quite small. The phyBOARD-Pollux-i.MX8MP kit only has 32MB SPI NOR flash populated. Only the bootloader and the environment can be stored. The kernel, device tree, and the filesystem are taken from eMMC by default.

The MTD partition setup:

RangeMTD Partition Name
0x000000000000-0x0000003c0000u-boot
0x0000003c0000-0x0000004c0000env
0x0000004c0000-0x000004000000none

The SPI NOR flash partition table is defined in the U-Boot environment. It can be printed with:

target$ printenv mtdparts 
mtdparts=30bb0000.spi:3840k(u-boot),1M(env),-(none)

The partition table is passed via device tree fixup to the kernel. Flashing the SPI NOR is described in the section Updating SPI NOR Flash from Network.

Updating Software 

In this section, we explain how to use the u-boot bootloader on target or Linux on target/host to update the images in eMMC and SPI NOR flash.

Updating eMMC from Network

i.MX 8M Plus boards have an Ethernet connector and can be updated over a network. Be sure to set up the development host correctly. The IP needs to be set to 192.168.3.10, the netmask to 255.255.255.0, and a TFTP server needs to be available. From a high-level point of view, an eMMC device is like an SD card. Therefore, it is possible to flash the image <name>.sdcard (or <name>.sdcard.bz2) from the Yocto build system directly to the eMMC. The image contains the bootloader, kernel, device trees, and root filesystem.

Updating eMMC from Network in u-boot on Target

These steps will show how to update the eMMC via a network. However, they only work if the size of the image file is less than 1GB. If the image file is larger, go to the section Updating eMMC from SD card in Linux on Target. Configure the boot switch to boot from SD Card (SwitchS3 POS1 is ON) and put in an SD card. Power on the board and stop in u-boot.

Tip

A working network is necessary!

  • Load your image via network to RAM:
u-boot=> tftp ${loadaddr} phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard
Using ethernet@30be0000 device
TFTP from server 192.168.3.10; our IP address is 192.168.3.11
Filename 'phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard'.
Load address: 0x40480000
Loading: #################################################################
         #################################################################
         #################################################################
         ...
         ...
         ...
         #################################################################
         ######
         19.4 MiB/s
done
Bytes transferred = 1122282496 (42e4ac00 hex)

  • Write the image to the eMMC:
u-boot=> mmc dev 2
switch to partitions #0, OK
mmc2(part 0) is current device
u-boot=> mmc write ${loadaddr} 0x0 0x217256                                  # number of blocks to write. In this case 1122282496 bytes / 512 = 0x217256

MMC write: dev # 2, block # 0, count 2191958 ... 2191958 blocks written: OK

Updating eMMC from USB in u-boot on Target

These steps will show how to update the eMMC via a USB device, but they only work if the size of the image file is less than 2GB. If the image file is larger, go to the section Updating eMMC from SD card in Linux on Target. Configure the boot switch to boot from SD Card (Switch S3 POS is ON) and put in an SD card. Power on the board and stop in u-boot. Insert a USB device with the proper *.sdcard image to the micro USB slot.

  • Load your image from the USB device to RAM:
u-boot=> usb start
starting USB...
Bus usb@38100000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@38200000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@38100000 for devices... 1 USB Device(s) found
scanning bus usb@38200000 for devices... 4 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found
u-boot=> fatload usb 0:1 ${loadaddr}  phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard
1122311168 bytes read in 5582 ms (191.7 MiB/s)
 
  • Write the image to the eMMC:
u-boot=> mmc dev 2
switch to partitions #0, OK
mmc2(part 0) is current device
u-boot=> mmc write ${loadaddr} 0x0 0x21728E

MMC write: dev # 2, block # 0, count 2192014 ... 2192014 blocks written: OK u-boot=> setenv mmcdev 2
u-boot=> boot

Updating eMMC via Network in Linux on Target

You can update the eMMC from your target.

Tip

A working network is necessary!

  • Take a compressed or uncompressed image on the host and send it with ssh through the network (then uncompress it, if necessary) to the eMMC of the target with a one-line command:
target$ ssh <USER>@192.168.3.10 "dd if=<path_to_file>/phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard" | dd of=/dev/mmcblk2

Updating eMMC in Linux on Host

It is also possible to update the eMMC from your Linux host. As before, you need a complete image on your host.

Tip

A working network is necessary!

  • Show your available image-files on host:
host$ ls
phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard
  • Send the image with dd command combined with ssh through the network to the eMMC of your device:
host$ dd if=phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard status=progress | ssh root@192.168.3.11 "dd of=/dev/mmcblk2"

Updating eMMC from SD Card

Even if there is no network available, you can update the eMMC. For that, you only need a ready-to-use image file (*.sdcard) located on an SD card. Because the image file is quite large, you have to enlarge your SD card to use its full space (if it was not enlarged before). To enlarge your SD card, see Resizing ext4 Root Filesystem.

Updating eMMC from SD card in u-boot on Target

Configure SD Card for Flashing

First, create a new partition on the SD card to store the image in it.

  • On your host, insert the SD card and use dmesg to see which one it is:
host$ dmesg | tail
...
[30436.175412] sd 4:0:0:0: [sdb] 62453760 512-byte logical blocks: (32.0 GB/29.8 GiB)
[30436.179846]  sdb: sdb1 sdb2
...
  • Create a new partition with sudo fdisk /dev/sd<x>:
host$ sudo fdisk /dev/sdb
Welcome to fdisk (util-linux 2.27.1).                                                  
Changes will remain in memory only, until you decide to write them.
Be careful before using the write command.
 
Command (m for help): p
Disk /dev/sdb: 29,8 GiB, 31976325120 bytes, 62453760 sectors
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (Plusmum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0xd28c31b9
 
Device     Boot Start     End Sectors  Size Id Type
/dev/sdb1       16384   81919   65536   32M  c W95 FAT32 (LBA)
/dev/sdb2       81920 3375103 3293184  1,6G 83 Linux
 
Command (m for help): n
Partition type
   p   primary (2 primary, 0 extended, 2 free)
   e   extended (container for logical partitions)
Select (default p): p
Partition number (3,4, default 3): 3
First sector (2048-62453759, default 2048): 3440640
Last sector, +sectors or +size{K,M,G,T,P} (3440640-62453759, default 62453759): 

Created a new partition 3 of type 'Linux' and of size 28,1 GiB.

Command (m for help): t
Partition number (1-3, default 3): 3
Partition type (type L to list all types): c
 
Changed type of partition 'Linux' to 'W95 FAT32 (LBA)'.
 
Command (m for help): w
The partition table has been altered.
Calling ioctl() to re-read partition table.
Syncing disks.
  • Give the new partition a name and mount it:
host$ sudo mkfs.vfat -n "data" /dev/sdb3 
mkfs.fat 3.0.28 (2015-05-16)
mkfs.fat: warning - lowercase labels might not work properly with DOS or Windows
host$ sudo mount /dev/sdb3 /mnt
  • Copy your image to the new partition and unmount it afterward:
host$ sudo cp phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard /mnt/ ; sync

Flash eMMC from u-boot

Tip

This step only works if the size of the image file is less than 1GB. If the image file is larger, go to Updating eMMC from SD card in Linux on Target.

  • Configure the boot switch to boot from the SD Card (Switch S3 POS 1 is ON) and insert the SD card.
  • Power on the board and stop in u-boot.
  • Flash your <YOUR_IMAGE>.sdcard image (for example small_test-image.sdcard) from the SD card to eMMC. This will partition the card and copy imx-boot, Imagedtb, and root filesystem to eMMC:
u-boot=> fatload mmc 1:3 ${loadaddr} phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard
1122311168 bytes read in 46526 ms (23 MiB/s)

u-boot=> mmc dev 2
switch to partitions #0, OK
mmc0(part 0) is current device
u-boot=> mmc write ${loadaddr} 0x0 0x21728E                                   # number of blocks to write. In this case 1122311168 bytes / 512 = 0x21728E

MMC write: dev # 2, block # 0, count 2192014 ... 2192014 blocks written: OK
  • Reset the board.
  • Stop in u-boot again and check that the partition table for eMMC is as expected:
u-boot=> reset    
...  
u-boot=> mmc dev 2
switch to partitions #2, OK
mmc2(part 0) is current device
u-boot=> mmc part   

Partition Map for MMC device 2  --   Partition Type: DOS

Part    Start Sector    Num Sectors     UUID            Type
  1     16384           124396          f857f1ca-01     0c Boot
  2     141312          2050702         f857f1ca-02     83

Updating eMMC from SD card in Linux on Target

You can also update the eMMC under Linux. You only need a complete image saved on the SD card (e.g. phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard).

  • Show your saved image files on the SD card:
target$ ls
phytec-qt5demo-image-phyboard-Pollux-imx8mp-2.sdcard
  • Show list of available MMC devices:
target$ ls /dev | grep mmc
mmcblk1
mmcblk1p1
mmcblk1p2
mmcblk2
mmcblk2boot0
mmcblk2boot1
mmcblk2p1
mmcblk2p2
mmcblk2rpmb
  • Write the image to the phyCORE-i.MX 8M Plus eMMC (MMC device 2 WITHOUT partition):
target$ dd if=phytec-qt5demo-image-phyboard-pollux-imx8mp-2.sdcard of=/dev/mmcblk2
  • After a complete write, your board can boot from eMMC.

Before this will work, you need to toggle Switch S3 POS1 to OFF. If you don't, the board will boot from the SD card again.

Updating SPI NOR Flash from Network

The SPI NOR can contain the bootloader and environment to boot from. The arm64 kernel can not decompress itself, the image sizes extend the SPI NOR flash populated on the phyCORE-i.MX 8M Plus.

Updating SPI NOR from Network in u-boot on Target

Similar to updating the eMMC over a network, be sure to set up the development host correctly. The IP needs to be set to 192.168.3.10, the netmask to 255.255.255.0, and a TFTP server needs to be available. Before reading and writing are possible, the SPI-NOR flash needs to be probed:

u-boot=> sf probe
SF: Detected mt25qu512a with page size 256 Bytes, erase size 64 KiB, total 64 MiB

A specially formatted u-boot image for the SPI NOR flash is used. Ensure you use the correct image file. Load the image over tftp, erase and write the bootloader to the flash:

u-boot=> tftp ${loadaddr} imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk_flexspi
u-boot=> sf erase 0 0x3c0000
SF: 3932160 bytes @ 0x0 Erased: OK
u-boot=> sf write ${loadaddr} 0 0x3c0000
device 0 offset 0x0, size 0x3c0000
SF: 3932160 bytes @ 0x0 Written: OK

Erase the environment partition as well. This way, the environment can be written after booting from SPI NOR flash:

u-boot=> sf erase 0x400000 0x100000

Warning

Erasing the complete SPI NOR flash when it is fully written will take quite some time. This can trigger the watchdog to reset. Due to this, erase the full flash in Linux.

Updating SPI NOR from Network in kernel on Target

First, copy the image from host to target:

host$ scp imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk root@192.168.3.11:/root

Find the number of erase blocks of the u-boot partition:

target$  mtdinfo /dev/mtd0
mtd0
Name:                           u-boot
Type:                           nor
Eraseblock size:                65536 bytes, 64.0 KiB
Amount of eraseblocks:          60 (3932160 bytes, 3.7 MiB)
Minimum input/output unit size: 1 byte
Sub-page size:                  1 byte
Character device major/minor:   90:0
Bad blocks are allowed:         false
Device is writable:             true

Erase the u-boot partition and flash it:

target$ flash_erase /dev/mtd0 0x0 60
target$ flashcp imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk_flexspi /dev/mtd0

Updating SPI NOR Flash from SD Card

The bootloader on SPI NOR flash can be also updated with SD Card.

Updating SPI NOR from SD Card in u-boot on Target

Copy the SPI NOR flash u-boot image imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk_flexspi to the FAT partition on the SD Card. Before reading and writing are possible the SPI-NOR flash needs to be probed:

u-boot=> sf probe
SF: Detected mt25qu512a with page size 256 Bytes, erase size 64 KiB, total 64 MiB

A specially formatted u-boot image for the SPI NOR flash is used. Ensure you use the correct image file. Load the image from the SD Card, erase and write the bootloader to the flash:

u-boot=> mmc dev 1
u-boot=> fatload mmc 1:1 ${loadaddr} imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk_flexspi
u-boot=> sf erase 0 0x3c0000
u-boot=> sf write ${loadaddr} 0 0x3c0000

Erase the environment partition as well. This way, the environment can be written after booting from SPI NOR flash:

u-boot=> sf erase 0x3c0000 0x100000

Warning

Erasing the complete SPI NOR flash when it is fully written will take quite some time. This can trigger the watchdog to reset. Due to this, erase the full flash in Linux.

Updating SPI NOR from SD Card in kernel on Target

First, mount the SD Card:

host$ mount /dev/mmcblk1p1 /mnt

Find the number of erase blocks of the u-boot partition:

target$  mtdinfo /dev/mtd0
mtd0
Name:                           u-boot
Type:                           nor
Eraseblock size:                65536 bytes, 64.0 KiB
Amount of eraseblocks:          60 (3932160 bytes, 3.7 MiB)
Minimum input/output unit size: 1 byte
Sub-page size:                  1 byte
Character device major/minor:   90:0
Bad blocks are allowed:         false
Device is writable:             true

Erase the u-boot partition and flash it:

target$ flash_erase /dev/mtd0 0x0 60
target$ flashcp /mnt/imx-boot-phyboard-pollux-imx8mp-2-fspi.bin-flash_evk_flexspi /dev/mtd0

RAUC

The Robust Auto-Update Controller (RAUC) mechanism is a new addition to Yogurt. PHYTEC has written an online manual on how we have intergraded RAUC into our BSPs (L-1006e.A1 RAUC Update & Device Management Manual).

Device Tree (DT)

Introduction

The following text briefly describes the Device Tree and can be found in the Linux kernel (linux/Documentation/devicetree/usage-model.txt).

"The "Open Firmware Device Tree", or simply Device Tree (DT), is a data structure and language for describing hardware. More specifically, it is a description of hardware that is readable by an operating system so that the operating system doesn't need to hardcode details of the machine.
Structurally, the DT is a tree or acyclic graph with named nodes, and nodes may have an arbitrary number of named properties encapsulating arbitrary data. A mechanism also exists to create arbitrary links from one node to another outside of the natural tree structure.
Conceptually, a common set of usage conventions called 'bindings', is defined for how data should appear in the tree to describe typical hardware characteristics including data busses, interrupt lines, GPIO connections, and peripheral devices."

The kernel is a really good source for a DT introduction. An overview of the device tree data format can be found on the device tree usage page at devicetree.org:

PHYTEC i.MX 8M Plus BSP Device Tree Concept

The following sections explain some rules PHYTEC has defined on how to set up device trees for our i.MX 8M Plus SoC-based boards.

DT Structure

The module includes the file Modul .dtsi which contains all devices mounted on the module, such as PMIC and RAM. Devices that come from the i.MX 8M Plus SoC but are just routed down to the carrier board are not part of the Module .dtsi. These devices are included in the Carrierboard .dtsi. The Board .dts includes the carrier board and module nodes. It also adds partition tables and enables all hardware configurable nodes of the carrier board or the module (i.e. the Board .dts shows the special characteristics of the board configuration). For example, there are phyCORE-i.MX 8M Plus SOMs may or may not have an SPI NOR flash mounted. The converter is enabled (if available) in the Board .dts and not in the Module .dtsi.

The PHYTEC i.MX8MP device trees for the PD21.1.1 release can be found in our linux-imx git repository: https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale?h=v5.4.70_2.3.2-phy

Accessing Peripherals

To find out which boards and modules are supported by the release of PHYTEC’s phyCORE-i.MX 8M Plus BSP described herein, visit our web page https://www.phytec.de/produkte/system-on-modules/phycore-imx-8m-plus/ and click the corresponding BSP release in the download section. Here you can find all hardware supported in the columns "Hardware Article Number" and the correct machine name in the corresponding cell under "Machine Name".

To achieve maximum software re-use, the Linux kernel offers a sophisticated infrastructure that layers software components into board-specific parts. The BSP tries to modularize the kit features as much as possible. This means that when a customized baseboard or even a customer-specific module is developed, most of the software support can be re-used without error-prone copy-and-paste. The kernel code corresponding to the boards can be found in device trees (DT) under linux/arch/arm64/boot/dts/freescale/*.dts*.

In fact, software re-use is one of the most important features of the Linux kernel, especially of the ARM implementation which always has to fight with an insane number of possibilities of the System-on-Chip CPUs. The whole board-specific hardware is described in DTs and is not part of the kernel image itself. The hardware description is in its own separate binary, called the Device Tree Blob (DTB) (section Device Tree). 

Please read section PHYTEC i.MX 8M Plus BSP Device Tree Concept to get an understanding of our i.MX 8 BSP device tree model. 

The following sections provide an overview of the supported hardware components and their operating system drivers on the i.MX 8 platform. Further changes can be ported upon customer request.

i.MX 8M Plus Pin Muxing

The i.MX 8M Plus SoC contains many peripheral interfaces. In order to reduce package size and lower overall system cost while maintaining maximum functionality, many of the i.MX 8M Plus terminals can multiplex up to eight signal functions. Although there are many combinations of pin multiplexing that are possible, only a certain number of sets, called IO sets, are valid due to timing limitations. These valid IO sets were carefully chosen to provide many possible application scenarios for the user.

Please refer to the NXP i.MX 8M Plus Reference Manual for more information about the specific pins and the muxing capabilities.

The IO set configuration, also called muxing, is done in the Device Tree. The driver pinctrl-single reads the DT's node fsl,pins, and does the appropriate pin muxing.

The following is an example of the pin muxing of the UART1 device in imx8mp-phyboard-pollux.dtsi:

 pinctrl_uart1: uart1grp {
 	fsl,pins = <
		MX8MP_IOMUXC_UART1_RXD_UART1_DCE_RX     0x49
		MX8MP_IOMUXC_UART1_TXD_UART1_DCE_TX     0x49
	>;
};

The first part of the string MX8MP_IOMUXC_UART1_RXD_UART1_DCE_RX names the pad (in this example UART1_RXD). The second part of the string (UART1_DCE_RX) is the desired muxing option for this pad. The pad setting value (hex value on the right) defines different modes of the pad, for example, if internal pull resistors are activated or not. In this case, the internal resistors are disabled.

Network

phyCORE-i.MX8MP provides two ethernet interfaces. A gigabit Ethernet is provided by our module and board. All interfaces offer a standard Linux network port that can be programmed using the BSD socket interface. The whole network configuration is handled by the systemd-networkd daemon. The relevant configuration files can be found on the target in /lib/systemd/network/ as well as the BSP in meta-yogurt/recipes-core/systemd/system-machine-units.

IP addresses can be configured within *.network files. The default IP address and netmask for eth0 is:

eth0: 192.168.3.11/24

The DT Ethernet setup might be split into two files depending on your hardware configuration: the module DT and the board-specific DT.

The device tree set up for the FEC ethernet IP core where the ethernet PHY is populated on the SoM can be found here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy2#n41

The device tree set up for EQOS Ethernet IP core where the PHY is populated on the phyBOARD-Pollux can be found here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy2#n127

SD/MMC Card

The i.MX 8M Plus supports a slot for Secure Digital Cards and MultiMedia Cards to be used as general-purpose block devices. These devices can be used in the same way as any other block device.

Warning

These kinds of devices are hot-pluggable. Nevertheless, you must ensure not to unplug the device while it is still mounted. This may result in data loss!

After inserting an SD/MMC card, the kernel will generate new device nodes in /dev. The full device can be reached via its /dev/mmcblk1 device node. SD/MMC card partitions will show up as:

/dev/mmcblk1p<Y>

<Y> counts as the partition number starting from 1 to the max count of partitions on this device. The partitions can be formatted with any kind of file system and also handled in a standard manner, e.g. the mount and umount command work as expected.

Tip

These partition device nodes will only be available if the card contains a valid partition table (”hard disk” like handling). If no partition table is present, the whole device can be used as a file system (”floppy” like handling). In this case, /dev/mmcblk1 must be used for formatting and mounting. The cards are always mounted as being writable.

DT configuration for the MMC (SD card slot) interface can be found here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy2#n359

DT configuration for the eMMC interface can be found here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy2#n230

eMMC Devices

PHYTEC modules like phyCORE-i.MX 8M Plus are populated with an eMMC memory chip as the main storage. eMMC devices contain raw MLC memory cells combined with a memory controller that handles ECC and wear leveling. They are connected via an SD/MMC interface to the i.MX 8M Plus and are represented as block devices in the Linux kernel like SD cards, flash drives, or hard disks.

The electric and protocol specifications are provided by JEDEC (https://www.jedec.org/standards-documents/technology-focus-areas/flash-memory-ssds-ufs-emmc/e-mmc). The eMMC manufacturer's datasheet is relatively short and meant to be read together with the supported version of the JEDEC eMMC standard.

PHYTEC currently utilizes the eMMC chips:

eMMC ChipSizeJEDEC Version
MTFC8GAPALBH-IT 85.1

Extended CSD Register

eMMC devices have an extensive amount of extra information and settings that are available via the Extended CSD registers. For a detailed list of the registers, see manufacturer datasheets and the JEDEC standard.

  • In the Linux user space, you can query the registers:
target$ mmc extcsd read /dev/mmcblk2

You will see:

 =============================================
   Extended CSD rev 1.7 (MMC 5.0)
 =============================================
 
 Card Supported Command sets [S_CMD_SET: 0x01]
 [...]

Enabling Background Operations (BKOPS)

In contrast to raw NAND Flash, an eMMC device contains a Flash Transfer Layer (FTL) that handles the wear leveling, block management, and ECC of the raw MLC cells. This requires some maintenance tasks (for example erasing unused blocks) that are performed regularly. These tasks are called Background Operations (BKOPS).

By default (depending on the chip), the background operations may or may not be executed periodically which impacts the worst-case read and write latency.

The JEDEC Standard has specified a method since version v4.41 that the host can issue BKOPS manually. See the JEDEC Standard chapter Background Operations and the description of registers BKOPS_EN (Reg: 163) and BKOPS_START (Reg: 164) in the eMMC datasheet for more details.

Meaning of Register BKOPS_EN (Reg: 163) Bit MANUAL_EN (Bit 0):

  • Value 0: The host does not support manual trigger of BKOPS. Device write performance suffers.
  • Value 1: The host does support manual trigger of BKOPS. It will issue BKOPS from time to time when it does not need the device.

The mechanism to issue background operations has been implemented in the Linux kernel since v3.7. You only have to enable BKOPS_EN on the eMMC device (see below for details).

The JEDEC standard v5.1 introduces a new automatic BKOPS feature. It frees the host to trigger the background operations regularly because the device starts BKOPS itself when it is idle (see the description of bit AUTO_EN in register BKOPS_EN (Reg: 163)).

The userspace tool mmc does not currently support enabling automatic BKOPS features.

  • To check whether BKOPS_EN is set, execute:
target$ mmc extcsd read /dev/mmcblk2 | grep BKOPS_EN

The output will be, for example:

Enable background operations handshake [BKOPS_EN]: 0x01
#OR
Enable background operations handshake [BKOPS_EN]: 0x00

Where value 0x00 means BKOPS_EN is disabled and device write performance suffers. Where value 0x01 means BKOPS_EN is enabled and the host will issue background operations from time to time.

  • To set the BKOPS_EN bit, execute:
target$ mmc bkops enable /dev/mmcblk0
  • To ensure that the new setting is taken over and the kernel triggers BKOPS by itself, shut down the system:
target$ poweroff

Tip

The BKOPS_EN bit is one-time programmable only. It cannot be reversed.

eMMC Boot Partitions

An eMMC device contains four different hardware partitions: userboot1boot2, and rpmb.

The user partition is called the User Data Area in the JEDEC standard and is the main storage partition. The partitions boot1 and boot2 can be used to host the bootloader and are more reliable. Which partition the i.MX 8M Plus uses to load the bootloader is controlled by the boot configuration of the eMMC device. The partition rpmb is a small partition and can only be accessed via a trusted mechanism.

Furthermore, the user partition can be divided into four user-defined General Purpose Area Partitions. An explanation of this feature exceeds the scope of this document. For further information, see the JEDEC Standard Chapter 7.2 Partition Management.

Tip

Do not confuse eMMC partitions with partitions of a DOS, MBR, or GPT partition table.

The current PHYTEC BSP does not use the extra partitioning feature of eMMC devices. The u-boot is flashed at the beginning of the user partition. The u-boot environment is placed at a fixed location after the u-boot. An MBR partition table is used to create two partitions, a FAT32 boot, and ext4 rootfs partition. They are located right after the u-boot and the u-boot environment. The FAT32 boot partition contains the kernel and device tree.

There are two ways to flash the bootloader to one of the two boot partitions and to switch the boot device: via bootloader or via userspace commands as shown in the following examples.

1. Via bootloader

  • Detect the eMMC if not already done:
bootloader$ mmc rescan
  • List all detected MMC devices:
bootloader$ mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2
  • Select eMMC device:
bootloader$  mmc dev 2
switch to partitions #0, OK
mmc2(part 0) is current device
  • Query some information about the eMMC device:
bootloader$ mmc info
  • The output will look like this:
switch to partitions #0, OK
mmc2(part 0) is current device
u-boot=> mmc info 
Device: FSL_SDHC
Manufacturer ID: 13
OEM: 14e
Name: Q2J55 
Bus Speed: 52000000
Mode : MMC High Speed (52MHz)
Rd Block Len: 512
MMC version 5.0
High Capacity: Yes
Capacity: 7.1 GiB
Bus Width: 8-bit DDR
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 7.1 GiB WRREL
Boot Capacity: 16 MiB ENH
RPMB Capacity: 4 MiB ENH

Reliable Write

There are two different Reliable Write options:

  1. Reliable Write option for a whole eMMC device/partition.
  2. Reliable Write for single write transactions.

Tip

Do not confuse eMMC partitions with partitions of a DOS, MBR, or GPT partition table (see the previous section).

The first Reliable Write option can be enabled with the mmc tool:

target$ mmc --help
 
[...]
mmc write_reliability set <-y|-n> <partition> <device>

The second Reliable Write option is the configuration bit Reliable Write Request parameter (bit 31) in command CMD23. It has been used in the kernel since v3.0 by file systems, e.g. ext4 for the journal and user space applications such as fdisk for the partition table. In the Linux kernel source code, it is handled via flag REQ_META.

Conclusion: ext4 file system with mount option data=journal should be safe against power cuts. The file system check can recover the file system after a power failure, but data that was written just before the power cut may be lost. In any case, a consistent state of the file system can be recovered. To ensure data consistency for the files of an application, the system functions fdatasync or fsync should be used in the application.

Resizing ext4 Root Filesystem

fdisk can be used to expand the root filesystem. The example works for any block device such as eMMC, SD card, or hard disk.

  • Get the current device size:
target$ fdisk -l /dev/mmcblk2
  • The output looks like:
Disk /dev/mmcblk2: 7264 MB, 7616856064 bytes, 14876672 sectors 116224 cylinders, 4 heads, 32 sectors/track
Units: sectors of 1 * 512 = 512 bytes

Device       Boot StartCHS        EndCHS      StartLBA     EndLBA    Sectors   Size   Id Type
/dev/mmcblk2p1 *    128,0,1       1023,3,32    16384       140779     124396   60.7M   c Win95 FAT32 (LBA)
/dev/mmcblk2p2      1023,3,32     1023,3,32    141312      2192013    2050702  1001M  83 Linux
  • Use fdisk to delete and create a partition with a max size of the device:
target$ fdisk /dev/mmcblk2
 
The number of cylinders for this disk is set to 116224.
There is nothing wrong with that, but this is larger than 1024,
and could in certain setups cause problems with:
1) software that runs at boot time (e.g., old versions of LILO)
2) booting and partitioning software from other OSs
   (e.g., DOS FDISK, OS/2 FDISK)

Command (m for help): p
Disk /dev/mmcblk2: 7264 MB, 7616856064 bytes, 14876672 sectors
116224 cylinders, 4 heads, 32 sectors/track
Units: sectors of 1 * 512 = 512 bytes

Device       Boot   StartCHS        EndCHS      StartLBA     EndLBA    Sectors   Size   Id Type
/dev/mmcblk2p1 *     128,0,1     1023,3,32         16384     140779     124396  60,7M    c Win95 FAT32 (LBA)
/dev/mmcblk2p2     1023,3,32     1023,3,32        141312    2192013    2050702  1001M   83 Linux

Command (m for help): d
Partition number (1-4): 2

Command (m for help): p
Disk /dev/mmcblk2: 7264 MB, 7616856064 bytes, 14876672 sectors
116224 cylinders, 4 heads, 32 sectors/track
Units: sectors of 1 * 512 = 512 bytes

Device       Boot StartCHS    EndCHS          StartLBA     EndLBA    Sectors  Size   Id Type
/dev/mmcblk2p1 *  128,0,1     1023,3,32          16384     140779     124396  60.7M   c Win95 FAT32 (LBA)

Command (m for help): n
Partition type
   p   primary partition (1-4)
   e   extended
p
Partition number (1-4): 2
First sector (32-14876671, default 32): 141456
Last sector or +size{,K,M,G,T} (141456-14876671, default 14876671): 
Using default value 14876671

Command (m for help): p 
Disk /dev/mmcblk2: 7264 MB, 7616856064 bytes, 14876672 sectors
116224 cylinders, 4 heads, 32 sectors/track
Units: sectors of 1 * 512 = 512 bytes

Device       Boot StartCHS      EndCHS        StartLBA     EndLBA    Sectors  Size   Id Type
/dev/mmcblk2p1 *   128,0,1      1023,3,32        16384     140779     124396  60.7M   c Win95 FAT32 (LBA)
/dev/mmcblk2p2   1023,3,32      1023,3,32       141456   14876671   14735216  7194M  83 Linux
 

Increasing the file system size can be done while it is mounted. An on-line resizing operation is performed. But you can also boot the board from an SD card and then resize the file system on the eMMC partition while it is not mounted. Furthermore, the board has to be rebooted so that the new partition table will be read.

Erasing the Device

It is possible to erase the eMMC device directly rather than overwriting it with zeros. The eMMC block management algorithm will erase the underlying MLC memory cells or mark these blocks as discard. The data on the device is lost and will be read back as zeros.

  • After booting from the SD card, execute:
target$ blkdiscard --secure /dev/mmcblk2

The option --secure ensures that the command waits until the eMMC device has erased all blocks.

Tip

dd if=/dev/zero of=/dev/mmcblk2 also destroys all information on the device, but this command is bad for wear leveling and takes much longer!

SPI Master

The i.MX 8M Plus controller has a FlexSPI and an ECSPI IP core included. The FlexSPI host controller supports two SPI channels with up to 4 devices. Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional data lines). The ECSPI controller supports 3 SPI interfaces with one dedicated chip select for each interface. As chip selects should be realized with GPIOs, more than one device on each channel is possible.

SPI NOR flash

phyCORE-i.MX 8M Plus is equipped with a QSPI NOR Flash which connects to the i.MX 8M Plus's FlexSPI interface. The QSPI NOR Flash is suitable for booting.  However, this is not supported in the current hardware revision. From Linux userspace, the NOR Flash partitions are accessible via /dev/mtd<N> devices where <N> is the MTD device number associated with the NOR flash partition to access. To find the correct MTD device number for a partition, run on the target:

target$ mtdinfo --all

It lists all MTD devices and the corresponding partition names. The flash node is defined inside of the SPI master node in the module DTS. The SPI node contains all devices connected to this SPI bus which is in this case only the SPI NOR Flash.

Definition of the SPI master node in the device tree can be found here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy2#n70

GPIOs

The phyBOARD-Pollux has a set of pins especially dedicated as user I/Os. Those pins are connected directly to i.MX 8M Plus pins and are muxed as GPIOs. They are directly usable in Linux userspace. The processor has organized its GPIOs into five banks of 32 GPIOs each (GPIO1 – GPIO5) and one bank with 32 GPIOs. gpiochip0gpiochip32gpiochip64gpiochip96, and gpiochip128 are the sysfs representation of these internal i.MX 8M Plus GPIO banks GPIO1 – GPIO5.

The GPIOs are identified as GPIO<X>_<Y> (e.g. GPIO5_07). <X> identifies the GPIO bank and counts from 1 to 5, while <Y> stands for the GPIO within the bank. <Y> is being counted from 0 to 31 (32 GPIOs on each bank).

By contrast, the Linux kernel uses a single integer to enumerate all available GPIOs in the system. The formula to calculate the right number is:

Linux GPIO number: <N> = (<X> - 1) * 32 + <Y>

Accessing GPIOs from userspace will be done using the libgpiod. It provides a library and tools for interacting with the Linux GPIO character device. Examples of the usage for some of the tools:

  • Detecting the gpiochips on the chip:
target$ gpiodetect
gpiochip0 [30200000.gpio] (32 lines)
gpiochip1 [30210000.gpio] (32 lines)
gpiochip2 [30220000.gpio] (32 lines)
gpiochip3 [30230000.gpio] (32 lines)
gpiochip4 [30240000.gpio] (32 lines)
  • Show detailed information about the gpiochips. Like their names, consumers, direction, active state, and additional flags:
target$ gpioinfo gpiochip0
  • Read the value of a GPIO (e.g GPIO 20 from chip0):
target$ gpioget gpiochip0 20
  • Set value of GPIO 20 on chip0 to 0 and exit tool:
target$ gpioset --mode=exit gpiochip0 20=0
  • Help text of gpioset shows possible options:
target$ gpioset --help
Usage: gpioset [OPTIONS] <chip name/number> <offset1>=<value1> <offset2>=<value2> ...
Set GPIO line values of a GPIO chip

Options:
  -h, --help:           display this message and exit
  -v, --version:        display the version and exit
  -l, --active-low:     set the line active state to low
  -m, --mode=[exit|wait|time|signal] (defaults to 'exit'):
                tell the program what to do after setting values
  -s, --sec=SEC:        specify the number of seconds to wait (only valid for --mode=time)
  -u, --usec=USEC:      specify the number of microseconds to wait (only valid for --mode=time)
  -b, --background:     after setting values: detach from the controlling terminal

Modes:
  exit:         set values and exit immediately
  wait:         set values and wait for user to press ENTER
  time:         set values and sleep for a specified amount of time
  signal:       set values and wait for SIGINT or SIGTERM

Note: the state of a GPIO line controlled over the character device reverts to default
when the last process referencing the file descriptor representing the device file exits.
This means that it's wrong to run gpioset, have it exit and expect the line to continue
being driven high or low. It may happen if given pin is floating but it must be interpreted
as undefined behavior.


Warning

Some of the user IOs are used for special functions. Before using a user IO, refer to the schematic or the hardware manual of your board to ensure that it is not already in use.

RS232/RS485

The i.MX 8M Plus SoC provides up to 4 UART units. phyBOARD-Pollux has an SP330e multiprotocol transceiver supporting RS-232 and RS-485 connected to UART2. The configuration of the SP330e is done by jumpers on the baseboard. For more information about the correct setup please refer to the L-1009e.A0 phyCORE-i.MX8MPlus/phyBOARD-Pollux (1549.0/1552.0) Hardware Manual section UARTs

The device tree representation for RS232 and RS485: https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy2#n323

RS232

Configuration of the UART interface can be done with stty. For example:

target$ stty -F /dev/ttymxc1 115200 crtscts raw -echo

With a simple echo and cat, basic communication can be tested. Example:

host$ cat /dev/ttyUSB2

Make sure that the baudrate configuration has been done correctly set on the host side as well. Then:

target$ echo 123 > /dev/ttymxc0

The host should then print out "123".

RS485

We use the same device tree node for RS-232 and RS-485. RS-485 mode can be enabled with ioctl TIOCSRS485. Also, full-duplex support is also configured using ioctls. Have a look at our small example application rs485test. It is also included in the BSP.

For easy testing, look at the linux-serial-test. This tool is called the IOCTL for RS485 and sends a constant stream of data.

  • Execute:
target$ linux-serial-test -p /dev/ttymxc1 -b 115200 --rs485 0

More information about the linux-serial-test tool and its parameters can be found here: https://github.com/cbrake/linux-serial-test
Documentation for calling the IOCTL within c-code is described in the Linux kernel documentation: https://www.kernel.org/doc/Documentation/serial/serial-rs485.txt

I2C Bus

The i.MX 8M Plus contains three Multimaster fast-mode I²C modules called I2C1, I2C2, I2C3, and I2C4. PHYTEC boards provide plenty of different I²C devices connected to the I²C modules of the i.MX 8M Plus. This section describes the basic device usage and its DT representation of some I²C devices integrated on our phyBOARD-Pollux.

General I²C1 bus configuration (e.g. imx8mp-phycore-som.dtsi):

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy#n104

General I²C2 bus configuration (e.g. imx8mp-phyboard-pollux.dtsi):

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy#n188

EEPROM

There are two different i2c EEPROM flashes populated on phyCORE-i.MX8MP SoM and on the phyBOARD-Pollux-i.MX8MP. Both can be used with the sysfs Interface in Linux. The ID page of the i2c EEPROM populated on the SoM is also used for board detection.

i2c EEPROM on phyCORE-i.MX8MP

The I2C EEPROM on the phyCORE-i.MX8MP SoM is connected to I2C address 0x51 on the I2C-0 bus.

It is possible to read and write directly to the device populated:

cat /sys/class/i2c-dev/i2c-0/device/0-0051/eeprom
  • To read and print the first 1024 bytes of the EEPROM as a hex number, execute:
target$ dd if=/sys/class/i2c-dev/i2c-0/device/0-0051/eeprom bs=1 count=1024  | od -x
  • To fill the whole EEPROM with zeros, use:
target$ dd if=/dev/zero of=/sys/class/i2c-dev/i2c-0/device/0-0051/eeprom bs=4096 count=1

DT representation, e.g. in phyCORE-i.MX 8M Plus file imx8mp-phycore-som.dtsi can be found in our PHYTEC git. See here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy#n209

Warning

The first 256 bytes are reserved for future purposes!

EEPROM ID Page SoM detection

The I2C EEPROM, populated on the phyCORE-i.MX8MP, has a separate ID page that is addressable over I2C address 0x59 on bus 0. PHYTEC uses this data area of 32 Byte to store information about the SoM. This includes PCB revision and mounting options.

The EEPROM data is read at a really early stage during startup. It is used to select the correct RAM configuration. This makes it possible to use the same bootloader image for different RAM sizes. More features will be implemented in future releases.

If the EEPROM ID page data is deleted the bootloader will fall back to the phyCORE-i.MX8MP Kit RAM setup. Which is 2GB of LPDDR4 RAM.

Warning

The EEPROM ID page (bus:I2C-0 addr: 0x59) should not be erased or overwritten. As this will influence the behavior of the bootloader. The board might not boot correctly anymore.

SoMs that are flashed with data format API revision 2 will print out information of the module in the early stage:

U-Boot SPL 2020.04 (May 10 2021 - 11:15:55 +0000)
SoM: PCM-070-0F3243I.A1 PCB rev: 1
DDRINFO: start DRAM init
DDRINFO: DRAM rate 4000MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Trying to boot from BOOTROM
...

i2c EEPROM on phyBOARD-Pollux-i.MX8MP

The I2C EEPROM on the phyCORE-i.MX8MP SoM is connected to I2C address 0x51 on the I2C-1 bus.

It is possible to read and write directly to the device populated :

cat /sys/class/i2c-dev/i2c-1/device/1-0051/eeprom
  • To read and print the first 64 bytes of the EEPROM as a hex number, execute:
target$ dd if=/sys/class/i2c-dev/i2c-1/device/1-0051/eeprom bs=1 count=64  | od -x
  • To fill the whole EEPROM with zeros, use:
target$ dd if=/dev/zero of=/sys/class/i2c-dev/i2c-1/device/1-0051/eeprom bs=256 count=1

DT representation, e.g. in phyCORE-i.MX 8M Plus file imx8mp-phyboard-pollux.dtsi can be found in our PHYTEC git. See here:

https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy#n197

RTC

RTCs can be accessed via /dev/rtc*. Because PHYTEC boards have often more than one RTC, there might be more than one RTC device file.

  • To find the name of the RTC device, you can read its sysfs entry with:
target$ cat /sys/class/rtc/rtc*/name
  • You will get, for example:
rtc-rv3028 0-0052
snvs_rtc 30370000.snvs:snvs-rtc-lp


Tip

This will list all RTCs including the non-I²C RTCs. Linux assigns RTC device IDs based on the device tree/aliases entries if present.

Date and time can be manipulated with the hwclock tool, using the -w (systohc) and -s (hctosys) options. To set the date, first use date and then run hwclock -w -u to store the new date into the RTC. For more information about this tool, refer to the manpage of hwclock.

DT representation for I²C RTCs:https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi?h=v5.4.70_2.3.2-phy2#n222

USB Host Controller

The USB controller of the i.MX 8M Plus SoC provides a low-cost connectivity solution for numerous consumer portable devices by providing a mechanism for data transfer between USB devices with a line/bus speed up to 4 Gbit/s (SuperSpeed 'SS'). The USB subsystem has two independent USB controller cores. Both cores are capable of acting as a USB peripheral device or a USB host. Each is connected to a USB 3.0 PHY.

The unified BSP includes support for mass storage devices and keyboards. Other USB-related device drivers must be enabled in the kernel configuration on demand.

Due to udev, all mass storage devices connected get unique IDs and can be found in /dev/disks/by-id. These IDs can be used in /etc/fstab to mount the different USB memory devices in different ways.

Both USB interfaces are configured as host in the kernel device tree imx8mp-phyboard-pollux.dtsi. See:https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy2#n332

CAN FD

The phyBOARD-Pollux two flexCAN interfaces supporting CAN FD. They are supported by the Linux standard CAN framework which builds upon then the Linux network layer. Using this framework, the CAN interfaces behave like an ordinary Linux network device, with some additional features special to CAN. More information can be found in the Linux Kernel documentation:

https://www.kernel.org/doc/html/latest/networking/can.html

  • Use:
target$ ip link

to see the state of the interfaces. The two CAN interfaces should show up as can0 and can1.

  • To get information on can0, such as bit rate and error counters, type:
target$ ip -d -s link show can0

The information for can0 will look like:

2: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 16 qdisc pfifo_fast state UNKNOWN mode DEFAULT group default qlen 10
    link/can  promiscuity 0 minmtu 0 maxmtu 0 
    can state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 0 
          bitrate 500000 sample-point 0.875 
          tq 50 prop-seg 17 phase-seg1 17 phase-seg2 5 sjw 1
          mcp25xxfd: tseg1 2..256 tseg2 1..128 sjw 1..128 brp 1..256 brp-inc 1
          mcp25xxfd: dtseg1 1..32 dtseg2 1..16 dsjw 1..16 dbrp 1..256 dbrp-inc 1
          clock 20000000
          re-started bus-errors arbit-lost error-warn error-pass bus-off
          0          0          0          0          0          0         numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535 
    RX: bytes  packets  errors  dropped overrun mcast   
    0          0        0       0       0       0       
    TX: bytes  packets  errors  dropped carrier collsns 
    0          0        0       0       0       0       

The output contains a standard set of parameters also shown for Ethernet interfaces, so not all of these are necessarily relevant for CAN (for example the MAC address). The following output parameters contain useful information:

FieldDescription
can0Interface Name
NOARPCAN cannot use ARP protocol
MTUMaximum Transfer Unit
RX packetsNumber of Received Packets
TX packetsNumber of Transmitted Packets
RX bytesNumber of Received Bytes
TX bytesNumber of Transmitted Bytes
errors...Bus Error Statistics

The CAN configuration is done in the systemd configuration file /lib/systemd/system/can0.service. For a persistent change of (as an example, the default bitrates), change the configuration in the BSP under ./meta-yogurt/recipes-core/systemd/systemd-machine-units/can0.service in the root filesystem and rebuild the root filesystem.

[Unit]
Description=can0 interface setup
 
[Service]
Type=simple
RemainAfterExit=yes
ExecStart=/sbin/ip link set can0 up type can bitrate 500000
ExecStop=/sbin/ip link set can0 down
 
[Install]
WantedBy=basic.target

The can0.service is started by default after boot. You can start and stop it using:

target$ systemctl stop can0.service
target$ systemctl start can0.service

The bitrate can also be changed manually, for example, to make use of the flexible bitrate:

target$ ip link set can0 down
target$ ip link set can0 txqueuelen 10 up type can bitrate 500000 sample-point 0.75 dbitrate 4000000 dsample-point 0.8 fd on

You can send messages with cansend or receive messages with candump:

target$ cansend can0 123#45.67
target$ candump can0

To generate random CAN traffic for testing purpose, use cangen:

target$ cangen

cansend --help and candump --help provide help messages for further information on options and usage.

Device Tree CAN configuration of imx8mp-phyboard-pollux.dtsi: https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy2#n152

WLAN

For WLAN and Bluetooth support, we use the Sterling-LWB module from LSR. This module supports 2,4 GHz bandwidth and can be run in several modes, like client mode, Access Point (AP) mode using WEP, WPA, WPA2 encryption, and more. More information about the module can be found at https://connectivity-staging.s3.us-east-2.amazonaws.com/2019-09/CS-DS-SterlingLWB%20v7_2.pdf.

More information about how to set up a WIFI connection can be found in Changing the Wireless Network Configuration.

Bluetooth

Bluetooth is connected with UART2 interface. More information about the module can be found at https://connectivity-staging.s3.us-east-2.amazonaws.com/2019-09/CS-DS-SterlingLWB%20v7_2.pdf. The Bluetooth device needs to be set up manually:

target$ hciconfig hci0 up
 
target$ hciconfig 
hci0:   Type: Primary  Bus: UART
        BD Address: AA:AA:AA:AA:AA:AA  ACL MTU: 1021:8  SCO MTU: 64:1
        UP RUNNING 
        RX bytes:1051 acl:0 sco:0 events:50 errors:0
        TX bytes:1291 acl:0 sco:0 commands:50 errors:0   

target$ hciconfig -a
hci0:   Type: Primary  Bus: UART
        BD Address: AA:AA:AA:AA:AA:AA  ACL MTU: 1021:8  SCO MTU: 64:1
        UP RUNNING 
        RX bytes:1051 acl:0 sco:0 events:50 errors:0
        TX bytes:1291 acl:0 sco:0 commands:50 errors:0
        Features: 0xbf 0xfe 0xcf 0xfe 0xdb 0xff 0x7b 0x87
        Packet type: DM1 DM3 DM5 DH1 DH3 DH5 HV1 HV2 HV3 
        Link policy: RSWITCH SNIFF 
        Link mode: SLAVE ACCEPT 
        Name: 'BlueZ 5.50'
        Class: 0x000000
        Service Classes: Unspecified
        Device Class: Miscellaneous, 
        HCI Version: 4.1 (0x7)  Revision: 0x0
        LMP Version: 4.1 (0x7)  Subversion: 0x2209
        Manufacturer: Broadcom Corporation (15)

Now you can scan your environment for visible Bluetooth devices. Bluetooth is not visible during a default startup.

target$ hcitool scan
Scanning ...
       XX:XX:XX:XX:XX:XX       <SSID>

Visibility

To activate visibility:

target$ hciconfig hci0 piscan

To disable visibility:

target$ hciconfig hci0 noscan

Connecting via bluetoothd

target$ bluetoothctl
[bluetooth]# discoverable on
Changing discoverable on succeeded
[bluetooth]# pairable on
Changing pairable on succeeded
[bluetooth]# agent on
Agent registered
[bluetooth]# default-agent 
Default agent request successful
[bluetooth]# scan on
[NEW] Device XX:XX:XX:XX:XX:XX <name>
[bluetooth]# connect XX:XX:XX:XX:XX:XX

PCIe

The phyCORE-i.MX 8M Plus has one Mini-PCIe slot. In general, PCIe autodetects new devices on the bus. After connecting the device and booting up the system, you can use the command lspci to see all PCIe devices recognized.

  • Type:
target$ lspci -v
  • You will receive:
00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0, IRQ 218
        Memory at 18000000 (64-bit, non-prefetchable) [size=1M]
        Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0
        I/O behind bridge: None
        Memory behind bridge: 18100000-181fffff [size=1M]
        Prefetchable memory behind bridge: None
        [virtual] Expansion ROM at 18200000 [disabled] [size=64K]
        Capabilities: [40] Power Management version 3
        Capabilities: [50] MSI: Enable+ Count=1/1 Maskable+ 64bit+
        Capabilities: [70] Express Root Port (Slot-), MSI 00
        Capabilities: [100] Advanced Error Reporting
        Capabilities: [148] L1 PM Substates
        Kernel driver in use: dwc3-haps

01:00.0 Network controller: Intel Corporation WiFi Link 5100
        Subsystem: Intel Corporation WiFi Link 5100 AGN
        Flags: fast devsel
        Memory at 18100000 (64-bit, non-prefetchable) [disabled] [size=8K]
        Capabilities: [c8] Power Management version 3
        Capabilities: [d0] MSI: Enable- Count=1/1 Maskable- 64bit+
        Capabilities: [e0] Express Endpoint, MSI 00
        Capabilities: [100] Advanced Error Reporting
        Capabilities: [140] Device Serial Number 00-24-d6-ff-ff-84-0d-1e
        Kernel modules: iwlwifi

In this example, the PCIe device is the Intel Corporation WiFi Link 5100.

For PCIe devices, you have to enable the correct driver in the kernel configuration. This WLAN card, for example, is manufactured by IntelKconfig. The option for the driver, which must be enabled, is named CONFIG_IWLWIFI and can be found under Intel Wireless WiFi Next Gen AGN - Wireless-N/Advanced-N/Ultimat in the kernel configuration.

  • In order to activate the driver, use:
host$ bitbake virtual/kernel -c menuconfig

For some devices like the WLAN card, additional binary firmware blobs are needed. These firmware blobs have to be placed in /lib/firmware/ before the device can be used.

  • Type:
host$ scp -r <firmware> root@192.168.3.11:/lib/firmware
  • For example, if you try to bring up the network interface:
target$ ip link set up wlp1s0
  • You will get the following output on the serial console:
[   58.682104] iwlwifi 0000:01:00.0: L1 Disabled - LTR Disabled
[   58.690822] iwlwifi 0000:01:00.0: L1 Disabled - LTR Disabled
[   58.696577] iwlwifi 0000:01:00.0: Radio type=0x1-0x2-0x0
[   58.831022] iwlwifi 0000:01:00.0: L1 Disabled - LTR Disabled
[   58.839679] iwlwifi 0000:01:00.0: L1 Disabled - LTR Disabled
[   58.845435] iwlwifi 0000:01:00.0: Radio type=0x1-0x2-0x0
[   58.902797] IPv6: ADDRCONF(NETDEV_UP): wlp1s0: link is not ready


Tip

Some PCIe devices, e.g. the Ethernet card, may function properly even if no firmware blob is loaded from /lib/firmware/ and you received an error message as shown in the first line of the output above. This is because some manufacturers provide the firmware as a fall-back on the card itself. In this case, the behavior and output depend strongly on the manufacturer's firmware.

Video

Videos with Gstreamer

The video is installed by default in the BSP:

target$ gst-launch-1.0 playbin uri=file:///usr/share/phytec-qtdemo/videos/caminandes.webm
 
#OR
 
target$ gst-launch-1.0 -v filesrc location=<video.mp4> \
! qtdemux  ! h264parse ! queue ! vpudec ! waylandsink async=false enable-last-sample=false \
qos=false sync=false
 
#OR
 
target$ gplay-1.0 /usr/share/phytec-qtdemo/videos/caminandes.webm

kmssink Plugin ID Evaluation

The kmssink plugin needs a connector ID. To get the connector ID, you can use the tool modetest.

target$ modetest -c -M imx-drm

The output will show something like:

Connectors:
id	encoder	status		name		size (mm)	modes	encoders
39	37	connected	LVDS-1         	216x135		1	37
  modes:
	index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
  #0 1280x800 59.07 1280 1380 1399 1440 800 804 808 823 70000 flags: phsync, pvsync; type: preferred, driver
  props:
	1 EDID:
		flags: immutable blob
		blobs:

		value:
	2 DPMS:
		flags: enum
		enums: On=0 Standby=1 Suspend=2 Off=3
		value: 0
	5 link-status:
		flags: enum
		enums: Good=0 Bad=1
		value: 0
	6 non-desktop:
		flags: immutable range
		values: 0 1
		value: 0
	4 TILE:
		flags: immutable blob
		blobs:

		value:
40	0	disconnected	HDMI-A-1       	0x0		0	38
  props:
	1 EDID:
		flags: immutable blob
		blobs:

		value:
	2 DPMS:
		flags: enum
		enums: On=0 Standby=1 Suspend=2 Off=3
		value: 0
	5 link-status:
		flags: enum
		enums: Good=0 Bad=1
		value: 0
	6 non-desktop:
		flags: immutable range
		values: 0 1
		value: 0
	4 TILE:
		flags: immutable blob
		blobs:

		value:

To draw a test pattern, type connector_id@crtc_id:mode. For example LVDS-1:

target$ systemctl stop weston@root
target$ modetest -M imx-drm -s 39@33:#0

Display

Choosing the Output

phyBOARD-Pollux has an HDMI output and two LVDS interfaces. LVDS0 (via PEB-AV-10) and LVDS1 (X25). We support a 10'' edt,etml1010g0dka display, and by default LVDS1 is activated.

To use LVDS0 instead, the device tree has to be modified:

In https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy#n250 LVDS-Channel 1 needs to be disabled:

/* LVDS1 */
&ldb {
	status = "okay";

	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "disabled";

		port@1 {
			reg = <1>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel1_in>;
			};
		};
	};
};

and in https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-010.dtsi?h=v5.4.70_2.3.2-phy#n98 LVDS-Channel 0 needs to be enabled:

&ldb {
	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";

		port@1 {
			reg = <1>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel0_in>;
			};
		};
	};
};

In software, HDMI is defined as a default display output. This can be changed by modifying the /etc/xdg/weston/weston.ini configuration:

target$ vi /etc/xdg/weston/weston.ini

Set the mode of the output of LVDS-1 to "current" and the mode of HDMI-A-1 to "off":

[output]
name=HDMI-A-1
mode=off

[output]
name=LVDS-1
mode=current

After a restart of the Weston compositor or the whole board, the output will appear on the display instead of HDMI.

target$ systemctl restart weston@root

With the phytec-qt5demo-image, Weston with the phytec-qt5demo starts during boot. The phytec-qt5demo can be stopped with:

target$ systemctl stop phytec-qtdemo
  • To start the demo again, run:
target$ systemctl start phytec-qtdemo
  • To disable autostart of the demo run:
target$ systemctl disable phytec-qtdemo
  • To enable autostart of the demo, run:
target$ systemctl enable phytec-qtdemo
  • Weston can be stopped with:
target$ systemctl stop weston@root

Device tree description of LVDS-1 and HDMI can be found here: https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux.dtsi?h=v5.4.70_2.3.2-phy

The device tree of LVDS-0 on PEB-AV-10 can be found here:  https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-010.dtsi?h=v5.4.70_2.3.2-phy

Framebuffer

This driver gains access to displays connected to PHYTEC carrier boards by using an emulated frame buffer device /dev/fb0.

  • To run a simple test of the framebuffer feature, execute:
fbtest -f /dev/fb0

This will show various test patterns on the display.

  • Information about the framebuffer's resolution can be obtained:
fbset

which will return something like:

mode "1280x800-0"
       # D: 0.000 MHz, H: 0.000 kHz, V: 0.000 Hz
       geometry 1280 800 1280 800 32
       timings 0 0 0 0 0 0 0
       accel true
       rgba 8/16,8/8,8/0,0/0
endmode
  • To query the color depth of the framebuffer emulation, type:
target$ cat /sys/class/graphics/fb0/bits_per_pixel

Backlight Control

If a display is connected to the PHYTEC board, you can control its backlight with the Linux kernel sysfs interface. All available backlight devices in the system can be found in the folder /sys/class/backlight. Reading the appropriate files and writing to them allows you to control the backlight.

  • To get, for example, the maximum brightness level (max_brightness) execute:
target$ cat /sys/class/backlight/backlight/max_brightness

which will result in:

7

Valid brightness values are 0 to <max_brightness>.

  • To obtain the current brightness level, type:
target$ cat /sys/class/backlight/backlight/brightness

you will get for example:

6
  • Write to the file brightness to change the brightness:
target$ echo 0 > /sys/class/backlight/backlight/brightness

turns the backlight off,

target$ echo 5 > /sys/class/backlight/backlight/brightness

sets the brightness to the third-highest brightness level. For documentation of all files, seehttps://www.kernel.org/doc/Documentation/ABI/stable/sysfs-class-backlight.

Audio

Playback devices supported for phyBOARD-Pollux are HDMI and the TI TLV320AIC3007 audio codec on the PEB-AV-10 connector. On the AV-Connector there is a 3.5mm headset jack with OMTP-standard and a 8-pin header.  The 8-pin header contains mono speaker, headphones and line in signals.

To check if your soundcard driver is loaded correctly and what the device is called, type for playback devices:

target$ aplay -L

Or type for recording devices:

target$ arecord -L

Alsamixer

To inspect the capabilities of your soundcard, call:

target$ alsamixer

The default card for Alsamixer is the codec on the AV-Connector, the Dummy Card and HDMI can be selected by pressing F6. You should see a lot of options as the TLV320-IC has many features you can experiment with. It might be better to open alsamixer via ssh instead of the serial console, as the console graphical effects are better. You have either mono or stereo gain controls for all mix points. "MM" means the feature is muted (both output, left & right), which can be toggled by hitting m. You can also toggle by hitting '<' for left and ''>' for right output.

ALSA configuration

Our BSP comes with an ALSA configuration file /etc/asound.conf which sets the Dummy Card as default. To set a different playback device as output, the config file can be edited:

target$ vi /etc/asound.conf

To set PEB-AV-10 as output for example set playback.pcm from "dummy" to "pebav10":

[...]

pcm.asymed {
        type asym
        playback.pcm "pebav10"
        capture.pcm "dsnoop"
}

[...]

Pulseaudio configuration

For applications using Pulseaudio, check for available sinks:

target$ pactl list short cards
0	alsa_card.platform-snd_dummy.0	module-alsa-card.c
1	alsa_card.platform-sound-hdmi	module-alsa-card.c
2	alsa_card.platform-sound-peb-av-10	module-alsa-card.c

To select PEB-AV-10, type:

target$ pactl set-default-sink 2

Playback

Run speaker-test to check playback availability:

target$ speaker-test -c 2 -t wav

To playback simple audio streams, you can use aplay. For example to play the ALSA test sounds:

target$ aplay /usr/share/sounds/alsa/*

To playback other formats like mp3 for example, you can use Gstreamer:

target$ gst-launch-1.0 playbin uri=file:/path/to/file.mp3

Capture

arecord is a command-line tool for capturing audio streams which useLine In as the default input source. To select a different audio source you can use alsamixer. For example, switch on Right PGA Mixer Mic3R and Left PGA Mixer Mic3Rin order to capture the audio from the microphone input of the TLV320-Codec using the 3.5mm jack.

target$ amixer -c1 sset 'Left PGA Mixer Mic3R' on
target$ amixer -c1 sset 'Right PGA Mixer Mic3R' on


target$ arecord -t wav -c 2 -r 44100 -f S16_LE test.wav

Since playback and capture share hardware interfaces it is not possible to use different sampling rates and formats for simultaneous playback and capture operation.

Power Management

CPU Core Management

The i.MX 8M Plus SoC can have multiple processor cores on the die. The i.MX 8M Plus Quad, for example, has 4 ARM Cores which can be turned on and off individually at runtime.

  • To see all available cores in the system, execute:
target$ ls /sys/devices/system/cpu  -1
  • This will show, for example:
cpu0    cpu1   cpu2   cpu3   cpufreq
[...]

Here the system has four processor cores. By default, all available cores in the system are enabled to get maximum performance.

  • To switch off a single-core, execute:
target$ echo 0 > /sys/devices/system/cpu/cpu3/online

As confirmation, you will see:

[  110.502295] CPU3: shutdown
[  110.505012] psci: CPU3 killed.

Now the core is powered down and no more processes are scheduled on this core.

  • You can use top to see a graphical overview of the cores and processes:
target$ htop
  • To power up the core again, execute:
target$ echo 1 > /sys/devices/system/cpu/cpu3/online

Suspend to RAM

The phyCORE-i.MX8MP supports basic suspend and resume. Different wake-up sources can be used.

Basically, suspend/resume is possible with:

target$ echo mem > /sys/power/state
#resume with pressing on/off button

To wakeup with serial console run:

target$ echo enabled > /sys/class/tty/ttymxc0/power/wakeup
target$ echo mem > /sys/power/state

snvs Power Key

The X_ONOFF pin connected to the ON/OFF button can be pressed long to trigger Power OFF without SW intervention or used to wake up the system out of suspend. With the snvs_pwrkey driver, the KEY_POWER event is also reported to userspace when the button is pressed. On default, systemd is configured to ignore such events. The function of Power OFF without SW intervention and the wake-up from suspend are not configured. Triggering a power off with systemd when pushing the ON/OFF button can be configured under/etc/systemd/logind.conf  and set using:

HandlePowerKey=poweroff 

Thermal Management

The Linux kernel has integrated thermal management that is capable of monitoring SoC temperatures, reducing the CPU frequency, driving fans, advising other drivers to reduce the power consumption of devices, and – worst-case – shutting down the system gracefully (https://www.kernel.org/doc/Documentation/thermal/sysfs-api.txt).

This section describes how the thermal management kernel API is used for the i.MX 8M Plus SoC platform. The i.MX8 has internal temperature sensors for the SoC.

  • The current temperature can be read in millicelsius with:
target$ cat /sys/class/thermal/thermal_zone0/temp
and
target$ cat /sys/class/thermal/thermal_zone1/temp
  • You will get, for example:
49000

There are two trip points registered by the imx_thermal kernel driver:

trip_point_0: 95 °C type: passive

trip_point_1: 100 °C type: critical

(see kernel sysfs folder /sys/class/thermal/thermal_zone0/)

These trip points are used by the kernel thermal management to trigger events and change the cooling behavior. The following thermal policies (also named thermal governors) are available in the kernel: Step WiseFair ShareBang Bang, and Userspace. The default policy used in the BSP is step_wise.  If the value of the SoC temperature in the sysfs file temp is above trip_point_0 (greater than 95 °C), the CPU frequency is set to the lowest CPU frequency. When the SoC temperature drops below trip_point_0 again, the throttling is released.

PWM Fan

A PWM fan can be connected to the phyBOARD-Pollux-i.MX8M Plus. The SoC only contains one temperature sensor which is already used by the thermal frequency scaling. The fan can not be controlled by the kernel. We use lmsensors with hwmon for this instead. lmsensors reads the temperature periodically and enables or disables the fan in a configurable threshold. For the phyBOARD-Pollux-i.MX8M Plus this is 60°C. 

The settings can be configured in the configuration file:

/etc/fancontrol

Fan control is started by a systemd service during boot. This can be disabled with:

target$ systemctl disable fancontrol

Watchdog

The PHYTEC i.MX8MP modules include a hardware watchdog that is able to reset the board when the system hangs. This section explains how to enable the watchdog in Linux using systemd to check for system hangs and during reboot. By default, the watchdog is enabled in the Linux kernel but disabled in systemd.

Watchdog Support in systemd

Systemd has included hardware watchdog support since version 183.

  • To activate watchdog support, the file system.conf in /etc/systemd/ has to be adapted by enabling the options:
RuntimeWatchdogSec=60s
ShutdownWatchdogSec=10min

RuntimeWatchdogSec defines the timeout value of the watchdog, while ShutdownWatchdogSec defines the timeout when the system is rebooted. For more detailed information about hardware watchdogs under systemd can be found athttp://0pointer.de/blog/projects/watchdog.html.

NPU

The i.MX 8M Plus SoC contains aNeural Processing Unit up to 2.3 TOPS as an accelerator for artificial intelligence operations.

Refer to our latest phyCORE-i.MX 8M Plus AI Kit Guide on the phyCORE-i.MX 8M Plus download section to get information about the NPU:

https://www.phytec.de/en/produkte/system-on-modules/phycore-imx-8m-plus/#downloads/

NXP Examples for eIQ

NXP provides a set of machine learning examples for eIQ using Python3. To add a pre-configured machine learning package group, add to your local.conf and build your BSP:

IMAGE_INSTALL_append = " packagegroup-imx-ml python3-pip python3-requests opencv"

This will require about 1GB additional space on the SD-Card.

Instructions on how to install and use the NXP examples can be found at https://community.nxp.com/t5/Blogs/PyeIQ-3-x-Release-User-Guide/ba-p/1305998 .

The installation of the eiq examples with pip3 requires an internet connection.

Note

On some Ubuntu 20.04 hosts, cmake uses the host's Python 3 instead of the Python 3.7 from Yocto when building python3-pybind11.

(see https://community.nxp.com/t5/i-MX-Processors/Yocto-L5-4-70-2-3-0-build-image-failed/m-p/1219619)

As a workaround edit, the python3-pybind11 recipe by:

$ devtool edit-recipe python3-pybind11

and add to the file:

EXTRA_OECMAKE += "-DPYTHON_EXECUTABLE=${RECIPE_SYSROOT_NATIVE}/usr/bin/python3-native/python3.7"

On-Chip OTP Controller (OCOTP_CTRL) - eFuses

The i.MX 8M Plus provides one-time programmable fuses to store information such as the MAC address, boot configuration, and other permanent settings ("On-Chip OTP Controller (OCOTP_CTRL)" in the i.MX 8M Plus Reference Manual). The following list is an abstract from the i.MX 8M Plus Reference Manual and includes some useful registers in the OCOTP_CTRL (at base address 0x30350000):

NameBankWordMemory offset to 0x30350000Description
OCOTP_MAC_ADDR0900x640contains lower 32 bits of ENET0 MAC address
OCOTP_MAC_ADDR1910x650contains upper 16 bits of ENET0 MAC address and the lower 16 bits of ENET1 MAC address
OCOTP_MAC_ADDR2920x660contains upper 32 bits of ENET1 MAC address

A complete list and a detailed mapping between the fuses in the OCOTP_CTRL and the boot/mac/... configuration are available in the section "Fuse Map" of the i.MX 8M Plus Security Reference Manual.

Reading Fuse Values in uBoot

You can read the content of a fuse using memory-mapped shadow registers. To calculate the memory address, use the fuse Bank and Word in the following formula:

OCOTP_MAC_ADDR:

u-boot=> fuse read 9 0

Reading Fuse Values in Linux

To access the content of the fuses in Linux NXP provides the NVMEM_IMX_OCOTP module. All fuse content of the memory-mapped shadow registers is accessable via sysfs:

target$ hexdump /sys/devices/platform/soc\@0/30000000.bus/30350000.ocotp-ctrl/imx-ocotp0/nvmem

Reading the registers using /dev/mem will cause the system to hang unless the ocotp_root_clk is enabled. To enable this clock permanent, add to the device tree:

&clk {
        init-on-array = <IMX8MP_CLK_OCOTP_ROOT>;
};

i.MX 8M Plus M7 Core

In addition to the Cortex-A53 cores, there is a Cortex-M7 core as MCU integrated into the i.MX 8M Plus SoC. Our Yocto-Linux-BSP runs on the A53-Cores and the M7-Core can be used as a secondary core for additional tasks using bare-metal or RTOS firmware. Both cores have access to the same peripherals and thus peripheral usage needs to be limited either in the M7's firmware or the devicetree for the Linux operating system. This section describes how to build firmware examples and how to run them on phyBOARD-Pollux.

Getting the Firmware Examples

The firmware can be built using the NXP MCUxpresso SDK with a compatible compiler toolchain using command-line tools.

Getting the Sources

The SDK and the examples for the i.MX 8M Plus are not yet available on Github and can only be obtained from NXP's web page:

  1. Register and log into the SDK Builder
  2. Select Board / Processor → Processors → i.MX → 8M Plus Quad → MIMX8ML8xxxLZ
  3. On the SDK Builder page select Linux Host and GCC ARM Embedded toolchain
  4. Select the optional components (as of SDK v2.9.0) multicore, CMSIS DSP Library, FreeRTOS and download, and the SDK archive

The M7 examples ported for phyBOARD-Pollux can be obtained in an additional repository, which can be cloned into the SDK once it is extracted:

$ tar -xf SDK_2.9.0_MIMX8ML8xxxLZ.tar.gz
$ git clone git@git.phytec.de:phytec-mcux-boards --branch SDK_2.9.0_phy

Phytec-mcux-boards contains all examples ported and tested for phyBOARD-Pollux with the current version 2.9.0. of the NXP SDK.

To build the firmware, a compiler toolchain and make/cmake are required. The GNU Arm Embedded Toolchain might be available in your distribution's repositories, e.g. type for Ubuntu 20.04:

$ sudo apt install gcc-arm-none-eabi binutils-arm-none-eabi make cmake
$ export ARMGCC_DIR=/usr

The toolchain can also be obtained directly from https://developer.arm.com/. After the archive has been extracted, the  ARMGCC_DIR has to be added to the environment, e.g. for the toolchain 10-2020-q4-major release located in the home directory:

$ export ARMGCC_DIR=~/gcc-arm-none-eabi-10-2020-q4-major

Building the Firmware

The scripts to build the firmware are located in<sdk-directory>/phytec-mcux-boards/phyboard-pollux/<example_category>/<example>/armgcc. There are scripts for each location the firmware is supposed to run, e.g. 

$ ./build_release.sh

to build the firmware for the M7's TCM. The output will be placed under release/ in the armgcc directory. .bin files and can be run in U-Boot and .elf files within Linux.

Running M7 Core Examples

There are two ways to run the M7 Core with the built firmware, U-Boot and Remoteproc within a running Linux.

To receive debug messages start your favorite terminal software (e.g. Minicom, Tio or Tera Term) on your host PC and configure it for 115200 baud, 8 data bits, no parity, and 1 stop bit (8n1) with no handshake.

Once a micro-USB cable is connected to the USB-debug port on the phyBOARD-Pollux, two ttyUSB devices are registered. One prints messages from A53-Core's debug uart and the other one from the M7-Core's debug uart.

Running Examples from U-Boot

To load firmware using the bootloader U-Boot, the bootaux command can be used:

  1. Prepare an SD-card with our Yocto-BSP
  2. Copy the generated .bin file to the SD-Cards first partition
  3. Stop the autoboot by pressing any key
  4. Type the command depending on the type of firmware:

For firmware built to run in the M7's TCM:

u-boot=> fatload mmc 1:1 0x48000000 firmware.bin;cp.b 0x48000000 0x7e0000 20000;
u-boot=> bootaux 0x7e0000
## Starting auxiliary core stack = 0x20020000, pc = 0x000004CD...

For firmware built to run in the DRAM:

u-boot=> fatload mmc 1:1 0x80000000 firmware.bin
u-boot=> dcache flush
u-boot=> bootaux 0x80000000
## Starting auxiliary core stack = 0x80400000, pc = 0x80000539...

The program's output should appear on the M7's debug UART.

Running Examples from Linux using Remoteproc

Remoteproc is a module that allows you to control the M7 Core from Linux during runtime. Firmware built for TCM can be loaded and the execution started or stopped. To use Remoteproc a devicetree needs to be loaded, which can be set in U-Boot:

u-boot=> setenv fdt_file imx8mp-phyboard-pollux-rdk-rpmsg.dtb
u-boot=> boot

Optionally, the fdt_file enviroment can be saved for future use imx8mp-phyboard-pollux-rdk-rpmsg.dtb by default:

u-boot=> setenv fdt_file imx8mp-phyboard-pollux-rdk-rpmsg.dtb
u-boot=> saveenv
u-boot=> boot

Firmware .elf files for the M7 core can be placed under /lib/firmware. To load the firmware, type:

target$ echo firmware.elf > /sys/class/remoteproc/remoteproc0/firmware 
target$ echo start > /sys/class/remoteproc/remoteproc0/state

To load a different firmware, the M7 core needs to be stopped:

target$ echo stop > /sys/class/remoteproc/remoteproc0/state

The Segger software can be obtained from https://www.segger.com/downloads/jlink/.

As of version V7.20a of the Segger software, accessing the i.MX 8M Plus' M7 core additional files have to be copied into the J-Link software directory: NXP J-Link files for IMX8MP

Together with the J-Link, GDB Server can be used for running and debugging the software.  On the phyBOARD-Pollux, the JTAG-Pins are accessible via the X6 Expansion Connector. The simplest way is to use a PEB-EVAL-01 board that has the JTAG-Pins reachable with a pin header on the top.

$ sudo apt install gdb gdb-multiarch

To start the J-Link software, type:

$ JLinkGDBServer -if JTAG -device MIMX8ML8_M7
...
Connected to target
Waiting for GDB connection...

To start GDB with a firmware example in another window, type:

$ gdb-multiarch firmware.elf 
...
(gdb) target remote localhost:2331
(gdb) monitor reset
Resetting target
(gdb) load
...
(gdb) monitor go