phyCORE-MPC5121e-tiny

QuickStart Instructions

Application Notes

Module Connector

PHYTEC Order Number: VB082

Other Documents

Visit Freescale MPC5121e Product Summary Page to find data sheets, manuals, erratas, application notes,  etc...

Development Tools

For support to the development tools please contact the tool developer.

 

JTAG Emulators

FAQ

phyCORE-MPC5121e-tiny

Updating the bootloader

There are three bootloaders possible on the phyCORE-MPC5121:

- If you press button S5 you will do a reset to Standard High Sector NOR (adress 0xFFF0 0000).

- If you press button S5 while you also have pressed S7 you will do a reset to Low Sector NOR (not installed by default, adress 0xFFE000000).

- If you press button S5 while you also have pressed S8 you will do a reset to High Sector NAND

For updating a bootloader at first please put its image to your tftp-server. The name of the image must be the one that it's stored in the bootloader's environment variable "uboot" that can be set with "setenv uboot <NameOfNewUboot>".

For updating the bootloader within NAND please execute "run update_nand".

For updating the bootloader within NOR please execute "protect off all" and then "run update". But please note that in case that you damage your bootloader in NOR and you don't have any other available, then you cannot use your board anymore and need to return it to us! So it's highly recommended that you first update the bootloader in NAND and only in case that it's really working then you might update the one in NOR!

After flashing the bootloader in NOR you should also erase its environment. You can execute "print" at first in order to get the current content listed. Then do "protect off all" followed by "erase fff60000 fff9ffff". After that you can redo your individual settings like "set ethaddr ......" if needed. Finally you do "saveenv".

Mehr als zwei CAN Ports verfügbar?

Der Prozessor kann zwar vier CAN-Ports, für unsere Basisplatine sind jedoch nur zwei rausgemuxt. Werden für eine kundenspezifische Basisplatine mehr CAN-Ports rausgemuxt, so verliert man eine oder auch zwei Interruptquellen. Damit funktioniert die Steuerung für unser CPLD nicht mehr. Dieses macht die Interruptsteuerung für PCI. Man müßte sich dafür also dann andere Interrupts suchen, die dann aber nicht mehr so hoch priorisiert sind wie die Interrupts 0 und 1.
Wenn Sie auf unserer Basisplatine CAN3 benutzen, treiben Sie auf jeden Fall gegen Ausgänge vom CPLD, was Ihnen entweder Ihre Signale zerschleift oder aber das CPLD beschädigt. Sie müßten das CPLD also erst löschen.

SATA nicht verfügbar

Gemäß NXP-Errata-Sheet MPC5121eDE.pdf, Kapitel 14 "SATA" gibt es die klare Aussage: "SATA Module is Non-functional. The SATA module does not function correctly. No work around available.". Offenbar plant NXP auch nicht, den Fehler zu beheben.

MMC-Karte wird nicht erkannt

Beim Einstecken einer MMC-Karte kommt die Fehlermeldung: "mmc0: host doesn’t support card’s voltage"

Grund: Der Port für die MMC-Karten läuft nur mit 3,3V. 5V-Karten werden abgewiesen.

Linux

Updating the bootloader

There are three bootloaders possible on the phyCORE-MPC5121:

- If you press button S5 you will do a reset to Standard High Sector NOR (adress 0xFFF0 0000).

- If you press button S5 while you also have pressed S7 you will do a reset to Low Sector NOR (not installed by default, adress 0xFFE000000).

- If you press button S5 while you also have pressed S8 you will do a reset to High Sector NAND

For updating a bootloader at first please put its image to your tftp-server. The name of the image must be the one that it's stored in the bootloader's environment variable "uboot" that can be set with "setenv uboot <NameOfNewUboot>".

For updating the bootloader within NAND please execute "run update_nand".

For updating the bootloader within NOR please execute "protect off all" and then "run update". But please note that in case that you damage your bootloader in NOR and you don't have any other available, then you cannot use your board anymore and need to return it to us! So it's highly recommended that you first update the bootloader in NAND and only in case that it's really working then you might update the one in NOR!

After flashing the bootloader in NOR you should also erase its environment. You can execute "print" at first in order to get the current content listed. Then do "protect off all" followed by "erase fff60000 fff9ffff". After that you can redo your individual settings like "set ethaddr ......" if needed. Finally you do "saveenv".

Mehr als zwei CAN Ports verfügbar?

Der Prozessor kann zwar vier CAN-Ports, für unsere Basisplatine sind jedoch nur zwei rausgemuxt. Werden für eine kundenspezifische Basisplatine mehr CAN-Ports rausgemuxt, so verliert man eine oder auch zwei Interruptquellen. Damit funktioniert die Steuerung für unser CPLD nicht mehr. Dieses macht die Interruptsteuerung für PCI. Man müßte sich dafür also dann andere Interrupts suchen, die dann aber nicht mehr so hoch priorisiert sind wie die Interrupts 0 und 1.
Wenn Sie auf unserer Basisplatine CAN3 benutzen, treiben Sie auf jeden Fall gegen Ausgänge vom CPLD, was Ihnen entweder Ihre Signale zerschleift oder aber das CPLD beschädigt. Sie müßten das CPLD also erst löschen.

SATA nicht verfügbar

Gemäß NXP-Errata-Sheet MPC5121eDE.pdf, Kapitel 14 "SATA" gibt es die klare Aussage: "SATA Module is Non-functional. The SATA module does not function correctly. No work around available.". Offenbar plant NXP auch nicht, den Fehler zu beheben.

MMC-Karte wird nicht erkannt

Beim Einstecken einer MMC-Karte kommt die Fehlermeldung: "mmc0: host doesn’t support card’s voltage"

Grund: Der Port für die MMC-Karten läuft nur mit 3,3V. 5V-Karten werden abgewiesen.

Fragen und Antworten zu ähnlichen Produkten

MPC5200B FPU initialization

CPU: MPC5200B
CPU: it applies to all CPUs which contain the G2 Core

Inititialisation of the FPU is necessary after reset!!

Author: Jan Kobler, jankobler@koblersystems.de
Date: 2008.12.18

The following text can be copied into an assembler file.
This code has been compiled with the GNU Compiler gcc 4.3.2
and tested on a Phytec phyCORE-MPC5200B-I/O board.

#####################################################################################
# Initialisation of the FPU is necessary after reset!!
#
# G2 PowerPC Core Reference Manual, Rev. 1
# www.nxp.com
#
# G2CORERM.pdf page 86: Before the stfd instruction is used to store the contents
# of an FPR to memory, the FPR must have been initialized after reset (explicitly
# loaded with any value) by using a floating-point load instruction.
#
# G2CORERM.pdf page 211: After Hard Reset and Power-On Reset FPRs are in an unknown state
#
# A better explanation is in the errata of the IBM 750CXe
# URL: www-01.ibm.com
# 750CXe_Err_DD3.X.pdf page 9
# A stfd can cause the part to hang if its source FPR has powered up in a certain state.
#

#####################################################################################
# add to your startup code the function __fpu_init

.global __fpu_init
__fpu_init:

# Load any address into r3 which is 8byte aligned and has read access at
# the current state of the start up
# Here an address in the flash is loaded. When the board is booted
# high (0xfff00100) it is sure that the address 0xfff00000 can be read
# right after the reset
#
# load value 0xfff00000 into r3
         lis         r3, 0xfff0 #
#
         lfd         f0, 0(r3) # load floating-point double from address r3
         lfd         f1, 0(r3) # load floating-point double from address r3
         lfd         f2, 0(r3) # load floating-point double from address r3
         lfd         f3, 0(r3) # load floating-point double from address r3
         lfd         f4, 0(r3) # load floating-point double from address r3
         lfd         f5, 0(r3) # load floating-point double from address r3
         lfd         f6, 0(r3) # load floating-point double from address r3
         lfd         f7, 0(r3) # load floating-point double from address r3
         lfd         f8, 0(r3) # load floating-point double from address r3
         lfd         f9, 0(r3) # load floating-point double from address r3
         lfd         f10, 0(r3) # load floating-point double from address r3
         lfd         f11, 0(r3) # load floating-point double from address r3
         lfd         f12, 0(r3) # load floating-point double from address r3
         lfd         f13, 0(r3) # load floating-point double from address r3
         lfd         f14, 0(r3) # load floating-point double from address r3
         lfd         f15, 0(r3) # load floating-point double from address r3
         lfd         f16, 0(r3) # load floating-point double from address r3
         lfd         f17, 0(r3) # load floating-point double from address r3
         lfd         f18, 0(r3) # load floating-point double from address r3
         lfd         f19, 0(r3) # load floating-point double from address r3
         lfd         f20, 0(r3) # load floating-point double from address r3
         lfd         f21, 0(r3) # load floating-point double from address r3
         lfd         f22, 0(r3) # load floating-point double from address r3
         lfd         f23, 0(r3) # load floating-point double from address r3
         lfd         f24, 0(r3) # load floating-point double from address r3
         lfd         f25, 0(r3) # load floating-point double from address r3
         lfd         f26, 0(r3) # load floating-point double from address r3
         lfd         f27, 0(r3) # load floating-point double from address r3
         lfd         f28, 0(r3) # load floating-point double from address r3
         lfd         f29, 0(r3) # load floating-point double from address r3
         lfd         f30, 0(r3) # load floating-point double from address r3
         lfd         f31, 0(r3) # load floating-point double from address r3

         blr          # Branch

#####################################################################################
# call the function __fpu_init in your start up code
#
# at first the FPU has to be enabled by setting the FP bit (floating point available)
# in the MSR
#
# load the current value of the msr
         mfmsr         r3 # move msr into r3
         ori         r3, r3, 0x2000 # or immediate
         mtmsr         r3 # move r3 into msr
# save the new value into the msr

# now call the function __fpu_init
         bl         __fpu_init # Branch

# continue your own startup code

NXP MPC5200B Dokumentation

Auf der Homepage von NXP auf der MPC5200 Product Summary Page finden Sie  Application Notes, Datasheets und Reference Manual und vieles mehr zu dem MPC5200 Controller

Link: MPC5200 Product Summary Page

phyCORE-MPC5200B-IO, phyCORE-MPC5554: Wo finde ich fertige FPGA IP-COREs?

Viele fertige IP-Cores für diverse Aufgaben, Schnittstellen usw. kann man im Internet beim Hersteller von FPGAs finden und in einigen IP-Cores Sammlungen. Eine umfangreiche Sammlung finden Sie z.B. unter http://www.opencores.org/