L-867Be.A0 phyCAM Basis Specification and Design-In Guide

Table of Contents

L-867Be.A0 phyCAM Basis Specification and Design-In Guide
Document TitleL-867Be.A0 phyCAM Digital Camera Modules Concept and Design-In Guide
Document TypeHardware/Software Guide
Article NumberL-867Be.A0
Release Date01.03.2021
Is Branch ofL-867Be.Ax phyCAM Digital Camera Modules Concept and Design-In Guide Head 

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The information in this document has been carefully checked and is considered to be entirely reliable. However, PHYTEC Messtechnik GmbH assumes no responsibility for any inaccuracies. PHYTEC Messtechnik GmbH neither gives any guarantee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product. PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages that might result.

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@ Copyright 2021 PHYTEC Messtechnik GmbH, D-55129 Mainz.

Rights - including those of translation, reprint, broadcast, photomechanical or similar reproduction and storage or processing in computer systems, in whole or in part - are reserved. No reproduction may occur without the express written consent from PHYTEC Messtechnik GmbH.

 

EUROPE

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INDIACHINA

Address:

PHYTEC Messtechnik GmbH
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D-55129 Mainz
GERMANY

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Bainbridge Island, WA 98110
USA

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FRANCE

PHYTEC Embedded Pvt. Ltd
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27th Main, 2nd Sector, Opp. PEP School
V2, HRS Layout
Bangalore 560102
INDIA

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2106A, Block A, Tianxia Jinniu Square,
Taoyuan Road, Nanshan District,
518052 Shenzhen,
CHINA

Ordering Information:

+49 6131 9221-32
sales@phytec.de

+1 800 278-9913
sales@phytec.com

+33 2 43 29 22 33
info@phytec.fr

+91-80-4086 7046/48
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+86-755-3395-5875
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Technical Support:

+49 6131 9221-31
support@phytec.de

+1 206 780-9047
support@phytec.com


support@phytec.fr

+91-80-4086 7047
support@phytec.in

support@phytec.cn

Fax:

+49 6131 9221-33

+1 206 780-9135

+33 2 43 29 22 34


+86-755-3395-5999

Web Site:

http://www.phytec.de
http://www.phytec.eu

http://www.phytec.com

http://www.phytec.fr

http://phytec.inhttp://www.phytec.cn

Introduction

The digital camera modules of the phyCAM series enable simple and efficient equipping of microcontroller designs with image processing technology.

Camera modules with phyCAM interface can be connected directly to the digital camera interface of the PHYTEC microcontroller modules. This allows easy integration of camera technology into compact, customized products. Many BSPs (Board Support Packages) of the PHYTEC microcontroller modules already include the corresponding software drivers for the phyCAM modules.

Due to the open interface definition, phyCAM modules can also be used together with other microcontrollers or hardware designs that have a corresponding camera interface. The interfaces of the phyCAM products are identical within the respective product series. This makes it possible to connect different camera modules with the same application circuit. This enables scalability during the design phase and in future design variants. There are four basic interface systems to enable optimum adaptation to the respective requirements of the specific application: phyCAM-P, phyCAM-S, phyCAM-M and phyCAM-L.

The phyCAM interface is supported by various powerful 32-bit controllers, such as the NXP i.MX6 controllers. Together with the different variants of the camera modules, a modular system is created from which the product developer can select the optimum combination. Each camera is optionally available as a pure circuit board version or with lens mounts for C/CS mount or M12 lenses. This allows for easy adaptation to the optical requirements of the application.

The phyCAM-Interface Concepts

The phyCAM concept comprises four basic interface models:

  • phyCAM-P - parallel data connection
  • phyCAM-S - serial LVDS data connection
  • phyCAM-M - MIPI CSI-2 data connection
  • phyCAM-L - FPD-Link III data connection

The properties of the data connection influence certain features of the device design. Depending on the requirements of the system architecture, the appropriate variant - phyCAM-P, phyCAM-S, phyCAM-M, or phyCAM-L- should therefore first be selected.


phyCAM-P (left) and phyCAM-S interface (right)            

phyCAM-P (left), phyCAM-S interface, phyCAM-M and phyCAM-L (right)

Regardless of the electrical design of the interface, the phyCAM interfaces transport the following signals between the camera and the application board:

  • Power supply of the camera
  • Clock supply to camera
  • Image data from the camera
  • Control data bus (I²C) for camera configuration
  • Additional functions possible

The most important features of the interface variants are listed below:

phyCAM-P

The parallel version of the phyCAM interface offers an extremely simple and cost-effective way to integrate the camera into a system. The data and control signals are transmitted in parallel via a 33-pin FFC cable. This reduces the interface effort to a minimum and still enables compatibility of the camera types. Reserved pins allow access to special functions such as trigger input or light controlImage data can be transferred with up to 12-bit grayscale resolution or color depth (color depth per channel).

phyCAM-P is particularly suitable for the device-internal installation of cameras. The cable length can be up to 30 cm. The phyCAM-P interface has been extended to include the PHYTEC SBCs (single-board computers), i.MX6UL phyBOARD-Segin, and i.MX6 phyBOARD-Nunki.

phyCAM-S

The phyCAM-S interface uses a serial LVDS interface for data transmission. Including power supply and control signals, phyCAM-S requires only 8 wires. This has three major advantages:

  • The device designer has more degrees of freedom; the cable is easier to lay. Within a device, the cable connection can be made via relatively thin and flexible cables, which have twisted pairs (LVDS pairs). The camera modules have compact Hirose connectors, which can be optimally integrated into a device-internal cabling concept. Due to the differential data transmission, favorable EMC characteristics are given, especially with longer cables.
  • The cable length can be up to 5 meters. This enables the camera head and main unit to be separated if necessary. (The maximum possible cable length depends on various parameters such as cable type and clock frequency).
  • With phyCAM-S, the levels of the data connection are standardized.

This simplifies designs that allow interchangeability between different camera types. The phyCAM-S cameras can be operated with the PHYTEC SBCs, phyBOARD i.MX6 Mira, and phyBOARD i.MX6 Nunki.

Properties of LVDS

LVDS (Low Voltage Differential Signaling) is an interface standard for fast data transmission. LVDS is standardized according to ANSI/TIA/EIA-644-1995. It describes the physical layer, not the protocols based on it.

Important features are:

  • Differential voltage levels
  • Relatively low voltage level (low voltage)
  • The signals are generated with a constant current source
  • Data is often transferred serially

LVDS operates with a voltage range of ±0.35 V. The difference between the levels of two wires (of the pair) is decisive for the logic state; not the absolute level to ground. A logic change is therefore generated by reversing the polarity of the lines. The absolute level is 1.2 V, while the difference in level between the two wires is only 0.3 V. This leads, among other things, to favorable EMC characteristics.

However, due to the low-level differences and high frequencies, a careful design is required. The differential wire pairs are usually twisted. On short distances, however, parallel wires are also possible (flat ribbon cable).

Since very few camera interfaces have a corresponding LVDS input, a deserializer is required on the processor side to convert the data stream into a parallel bus with an unbalanced level. Conversely, the clock signal to the camera is converted into the LVDS format using a corresponding driver module.

phyCAM-M

The phyCAM-M interface is based on the CSI-2 MIPI standard and also defines a connector for professional applications. phyCAM-M offers high compatibility of different camera modules to allow easy interchangeability in all phases of a project. The internal cable routing can be up to 15 cm and can be flexibly planned.

In addition to the data and clock line pairs provided in the CSI-2 standard, an I²C bus is also available as a configuration interface. In addition, the phyCAM M camera modules have up to four control lines (3.3 V I/O) in order to be able to use the special functions of the various camera sensors. A 2 kB EEPROM is always equipped on phyCAM-M camera modules to store individual configurations or features of a camera module or lens.

Camera modules with a phyCAM-M interface can be operated on the PHYTEC SBC phyBOARD-i.MX 6 Nunki.

phyCAM-L

With phyCAM-L, the data connection is created using the FPD-Link III.A relatively thin and flexible coaxial connection is chosen as the cable.This provides image data, control signals, and the power supply (PoC).

Like phyCAM-S, phyCAM-L is designed for longer cable routes.Instead of the usual 15 cm with phyCAM-M, up to 15 meters are possible.

phyCAM-L camera modules have an expansion connector, which enables additional features such as exposure, autofocus, etc. to be implemented on the remote camera head.The supply can also be made available via PoC.

phyCAM Features Overview

The most important selection criteria for selecting the appropriate interface concept[1]:

Feature

phyCAM-P

phyCAM-S

phyCAM-M

phyCAM-L

Cost-optimized Design

+


+


Max. Cable Length

30 cm

5 m

15 cm

15 m

Camera Type Interchangeable

+

++

+

++

Data Word Width per Clock Pulse

10 bis 12

8

6 bis 24

6 bis 24

Flexible Cable Connection


+



Special Features

+


++

++

Remote Camera Head


+


++

High Data Throughout

+


++

+

Use with phyBOARD i.MX6UL Segin

1x

-

-

-

Use with phyBOARS i.MX6 Mira

-

1x

-

-

Use with phyBOARD i.MX6 Nunki

2x

2x

1x

1x (with VZ-018)




2x (with VZ-018)

Selection Guide - phyCAM-P / phyCAM-S / phyCAM-M / phyCAM-L

1.

If the module has an optional parallel camera interface

Basically, a very simple circuit design can be realized with phyCAM-P camera modules, which gets by with few components on the processor side. It can be adapted to exactly one specific board. As a result, the circuit effort is very cost-optimized.

Depending on the camera and processor used, in the simplest case, only the cable connections between the plug connector and the camera interface of the controller module need to be pulled out. Level shifters may be required if the camera and controller interface have different levels. Finally, if different camera modules are to be connected, a variable level adjustment must be provided.

With phyCAM-P, the circuit design of the baseboard can be individually adapted and varied to the requirements of the application. Corresponding circuit suggestions can be found in the Design-In Guide

With the phyCAM-P interface, freely configurable control lines enable the wiring of certain individual additional camera functions. These can be trigger and strobe signals or the dynamic selection of the camera address on the I²C bus. Some camera modules allow different functions of these control lines via jumpers. PHYTEC offers the delivery of camera modules with a customer-specific configuration for series quantities.

This means that phyCAM-P allows you to use additional interesting features of the respective camera module. Since the different cameras offer different features, it is important to ensure compatibility in the circuit design if several camera modules are to be used.

In addition, phyCAM-M offers a larger data word width, as well as the advantages of differential data transmission with up to 6 Gb/s. In addition, up to four control lines are available for additional camera functions. At the same time, thanks to the sophisticated interface assignment, the interchangeability of different camera modules are much easier than with phyCAM-P.

Since only a very limited cable length can be implemented with phyCAM-M, the transmission of up to 15 meters is possible with phyCAM-L.

phyCAM-S offers an electrically fully-standardized interface. In addition to the pin assignment, the levels of the lines are fixed. If another camera module is connected, only the corresponding software drivers have to be loaded. Any additional camera functions are not transmitted via the interface cable. If necessary, they are available directly on the camera module via an additional connector.

Since additional components are required for the LVDS transmission and level adjustment of the signals and the power supply both on the camera and on the application board, a phyCAM-S design is somewhat more complex overall, but also offers the advantages described above in terms of cable length and flexibility as well as EMC properties.

Tip

PHYTEC will be happy to advise you on the selection and design of the appropriate phyCAM interface.

Mechanical and Optical Connection

Since the mechanical and optical integration of the camera into a device depends on various factors, the phyCAM concept offers a modular system that can cover various scenarios.

All camera modules of the phyCAM series have identical mounting options. The sensor board has six mounting points - four on the outer edges of the camera and two in the middle next to the sensor. The latter can be supplied with an optical cover.

The mechanical dimensions are compatible so that the camera modules can be interchanged. Dimensional drawings of the camera boards can be found on the download page for each camera module:
https://www.phytec.de/produkte/embedded-imaging/phycam/ → Product → Download → Dimensioned Drawings (.step format)

The optical connection is another important criterion. The phyCAM system covers different requirements for the size of the camera on the one hand and the quality and design of the lens on the other.

Each camera module is available in the following configurations:

  • M12 – Lens Holder
    With this version, the camera module is supplied with a holder for M12 lenses (also known as D-Mount). This version is also included in the embedded video kits.
    M12 lenses are a good compromise between size and lens characteristics. They are available in a variety of focal lengths and apertures.
    The four holes on the edge of the board can be used to mount the camera module.
  • C/CS-Mount – Lens holder
    This lens mount is a solution for applications that place the highest demands on the quality of image reproduction. The holder is made of plastic with a metal threaded insert, which also allows the adjustment of the flange focal distance. The back focal distance between C- and CS-Mount lenses can be adjusted via an optional intermediate ring. The camera module is attached to the bracket with four screws.
    C/CS-Mount lenses not only offer excellent image quality but also options such as adjustable aperture, zoom function or are available in the telecentric design.
  • PCB version
    This option gives the developer complete freedom in device design. The camera board can be used together with special lens mounts or can be integrated directly into housing mounts. In this form, it is also suitable for special applications, e.g. in laser technology.
    All six fixing points can be used for the mechanical concept. Optionally, the board can be supplied with light-tight-covered inner holes.

Housing options with lenses samples: M12 (left), C/CS-Mount (center), PCB (right)

Typical Design Flow

With phyCAM and the PHYTEC microcontroller modules, PHYTEC Embedded Imaging Kits offer a modular system for the design of customer-specific devices. The standardized phyCAM interfaces allow the combination of those components that are optimally suited to the given system requirements.

The development of an individual device with camera functionality takes place in just six simple and easy-to-manage steps:

Typical 6-Step Design Flow

Typical 6-Step Design Flow

  1. Selecting the Appropriate Microprocessor-based SOM
    PHYTEC offers a wide variety of SOMs supporting many different features. PHYTEC digital imaging hardware supports phyCORE, phyCARD, and phyFLEX product lines.

  2. Selecting the Camera module
    The PHYTEC product range includes monochrome and color sensors with different resolutions and color formats.
    Each camera module is available in three mechanical versions. Depending on the mechanical and optical conditions, a choice can be made between the pure camera module and modules with a ready-mounted M12 or C/CS mount lens holder.
    Ready-made solutions are also available for the integration of analog video signals and thermal imaging applications 

  3. Start with a PHYTEC Embedded Imaging Development Kit
    The SBC kit comes with the controller module, camera, and SBC, as well as all the cables required to set up an operational system. The supplied Board Support Package (BSP) and the Cross-Compiler Build Environment include the software drivers for the various camera modules and image processing libraries, such as OpenCV, so that all necessary software requirements are met to work on the project.
    The software can be developed before the actual application hardware is available.

  4. Application Hardware
    The individual application board is designed on the basis of the basic board contained in the kit. Since the complex circuit parts are localized on the module, the design of this carrier board is simple.
    Upon request, PHYTEC will support you in this step or carry out the development for you.

  5. Development of Application Software
    This step can be done parallel to the hardware design since the hardware of the SBC kit can be used for this. This saves valuable development time and provides additional design security.
    PHYTEC offers complex image processing libraries that are adapted to the module BSPs.
    For example, powerful algorithms can be integrated into the application with the HALCON Embedded software, the OpenCV library, or other software libraries.

  6. End Product
    Due to the preliminary services, finished components in a modular system, kits for development support and parallelization of the development steps, development is possible in a short time.
    Design security is significantly higher than with individual device development due to the lower complexity. If the hardware and software design is appropriately designed, the components can be exchanged to scale camera or computer performance.

Specifications

phyCAM-P Interface

Main characteristics of the phyCAM-P interface:

  • Parallel data interface for image data (camera to the microcontroller)
  • I²C interface for camera control (register settings)
  • 33-pin FFC-connector -> 0.5mm pitch, matching cable thickness -> 0.3 mm
  • Power supply and signal voltage levels depend on the camera sensor used on the camera module and may vary between the phyCAM-P models. The level translation is done on the PHYTEC Carrier Board or, if necessary, on the customized application board. To detect the required level, the interface provides a control pin (resistive).
  • Recommended maximum cable length < 30 cm

Interface signals:

  • Camera power supply
  • Master clock to camera
  • Image data and synchronous signals
  • I²C–bus for camera control and special functions(depending on the camera module)
  • Control signals (optional: reset, output enable, ...)
  • Multipurpose signals (optional: trigger, strobe, I/O-signals, …)

Connector

33-pin FFC/FPC, 0.5 mm pitch, 0.3 mm thick, contact position bottom.

FFC-connector phyCAM-P (left: top view, right: solder side, example)

Suitable connectors for application board:

  • Hirose FH12-33S-0.5SH(55) (horizontal, Flip-Lock, PHYTEC Order No.: VE350)
  • Hirose FH12-33S-0.5SVA(54) (vertical, Flip-Lock, PHYTEC Order No.: VE162)
  • Samtec ZF5S-33-03-T-WT-TR (vertical, Shift-Lock, PHYTEC Order No.: VE531)

Matching cables:

Length

Cable Type

Contacts Position

PHYTEC part no.

120 mm

FFC

equilateral

WF062

200 mm

FFC

equilateral

WF043

300 mm

FFC

equilateral

WF046

phyCAM-P Interface Pin Assignment

phyCAM-P - Electrical Interface Camera Module

Pin

Signal

Signal Type[2]

Signal Level

Function

1


V
CAM


PWR_IN


2.8 V / 3.3 V

Power Supply Input 
Voltage depends on VCC_SELECT

2

3

CAM_nRST

I

VCAM

Reset in (active low)

4

GND

-

0 V

Ground

5

CAM_SDA

OD-BI

VCAM

I²C-Interface, SDA-Line

6

CAM_SCL

OD-BI

VCAM

I²C-Interface, SCL-Line

7

CAM_CTRL1

I/O

VCAM

Camera Dependent Feature (Address Select, Strobe, I/O, …)

8

GND

-

0 V

Ground

9

CAM_FV

O

VCAM

VSYNC

10

CAM_LV

O

VCAM

HSYNC

11

GND

-

0 V

Ground

12

CAM_DD9

O

VCAM

D9 (MSB)

13

CAM_DD8

O

VCAM

D8

14

GND

-

0 V

Ground

15

CAM_DD7

O

VCAM

D7

16

CAM_DD6

O

VCAM

D6

17

GND

-

0 V

Ground

18

CAM_DD5

O

VCAM

D5

19

CAM_DD4

O

VCAM

D4

20

GND

-

0 V

Ground

21

CAM_DD3

O

VCAM

D3

22

CAM_DD2

O

VCAM

D2

23

GND

-

0 V

Ground

24

CAM_DD1

O

VCAM

D1

25

CAM_DD0

O

VCAM

D0 (LSB)

26

GND

-

0 V

Ground

27

CAM_PCLK

O

VCAM

Pixel Clock

28

GND

-

0 V

Ground

29

CAM_MCLK

I

VCAM

Master Clock

30

CAM_CTRL2

I/O

VCAM

Camera Dependent Feature2 (Trigger, I/O, …)

31

VCC_SELECT

Analog

-

Defines voltage on VCAMPins. See: VCC_SELECT-Resistor

32

CAM_OE

I

VCAM

Data Lines Output Enable  (optional)

33

VCAM

PWR_IN

2.8 V / 3.3 V

Power Supply Input

Pin Assignment phyCAM-P Interface

2.

Signal direction from the camera's point of view.

Notes

  • The supply voltage must be provided by the baseboard. During a power cycle, the supply voltage should be completely discharged to ensure the correct operation of the camera module.
  • The operating voltage VCAM can vary for different camera modules (see individual description of the camera modules). A variable power supply must be available on a carrier board that supports several phyCAM boards. The required voltage can be detected by the carrier board via the resistance value at pin 31, and the voltage source can be configured automatically. See design examples in the Design-In Guide.
  • CAM_nRST: The reset signal must be kept LOW during a power cycle.
  • The signal voltage on the data lines corresponds to the supply voltage of the phyCAM module. A level shifter must be provided on a baseboard that supports several phyCAM modules in order to carry out the corresponding voltage conversion (see reference designs in the Design-In Guide).
  • The levels of the I²C interface correspond to the levels of the data lines. The pull-up resistors are provided on the carrier /application board unless they are already present on the corresponding controller module.
  • The signal voltage of the I²C interface corresponds to the supply voltage of the phyCAM module. The pull-up resistors must be provided on the application board.
  • The CAM_CTRL1 / CAM_CTRL2 connections can have different functions depending on the specific phyCAM module. In the standard configuration, they must be connected to GND on the application board with a jumper.
    CAM_CTRL1 serves as the address select line for the I²C interface when the phyCAM module is equipped as standard, provided this is supported by the camera sensor. CAM_CTRL2 is used as an additional GND for standard assembly.
  • The signal directions of the lines FV, LV, and PCLK are "out", i.e. the camera controls the camera interface of the controller (so-called "master mode"). If the camera also supports slave mode, these signals can also act as inputs. However, this is optional and does not have to be taken into account when designing the carrier boards.
  • The CAM_OE signal switches the data and, optionally, the synchronization signals to the tristate state provided that the camera sensor supports this (see description of the specific camera model). This feature is optional. The CAM_OE line does not necessarily have to be wired on the baseboard (open = outputs are activated).

Important!

The pin numbering refers to the connector of the camera. When designing your own application boards, note that the pin assignment may be reflected on the application board depending on the FFC cable used.

VCC_SELECT-Resistor

Pin 31 of the camera connector is connected to a resistor against GND (operating ground). The resistance value, which can be measured against GND at this pin, defines the voltage level for the operating voltage and the data lines of the camera module. In this way, the application board can adapt to the required level.

The resistance value for the corresponding operating and signal voltages:

Voltage Selection

VCAM
(tolerance: +/-2%) 

Resistance at pin 31 to GND

3.3 V

0 Ohm

2.8 V

220 Ohm

Tip

The resistance values are graded so that the resistance can be used as a base resistance in the feedback branch of an adjustable voltage regulator. Please see phyCAM-P Reference Design for examples.

phyCAM-P Interface Electrical Specifications

The following table shows the general specification of the phyCAM-P interface on the receiver side (carrier board). Explicit information on the individual camera modules can be found in the respective hardware manuals.

 

Symbol

min.

typ.

max.

Unit

DC Electrical Characteristics

Supply Voltage (VCC_SELECT = 0 Ω)

VCAM

-

3.3

-

V

Supply Voltage (VCC_SELECT = 220 Ω)

VCAM

-

2.8

-

V

Supply Current

ICAM

-

150

500

mA

Input HIGH Voltage

VIH

-

VCAM

-

V

Input LOW Voltage

VIL

-

0

-

V

Output HIGH Voltage

VOH

-

VCAM

-

V

Output LOW Voltage

VOL

-

0

-

V

Output LOW Current (I²C Bus)

IOL

-

3

-

mA

Timing Characteristics

VCAM to nRESET

tVRST

500

-

-

µs

I2C_SCL Frequency

fSCL

-

100

400

kHz

General phyCAM-P Interface Electrical Specifications

Warning

When phyCAM-P modules are switched on, the supply voltage must increase monotonously (no dropouts). Otherwise, it is possible that the internal reset circuits of the camera module will not work correctly and could lead to malfunctions of the camera module.

phyCAM-S/S+ Interface

Main characteristics of the phyCAM-S interface:

  • Image data, clock, and sync signals from the camera are transferred via a serial LVDS interface to the controller interface.
  • Parameterization of the camera, as well as access to the camera configuration registers, via I²C bus
  • 8-pin miniature crimping connector, 1.25 mm pitch.
  • 3V operating voltage and signal level of the I²C interface
  • Recommended maximum cable length: up to 5m, using a CAT-5e cable. (The maximum length depends on cable type and quality.)

Interface signals:

  • Power supply (3.3V) to the camera
  • Master clock to camera (LVDS)
  • Image data and synchronous signals from the camera (LVDS)
  • I²C interface for camera control and special functions(depending on the camera module)

Connector

8-pin Hirose miniature, 1.25 mm pitch crimping connector.

Suitable connectors for application board:

  • Hirose DF13A-8P-1.25H (horizontal, PHYTEC order no.: VM205)
  • Hirose DF13C-8P-1.25V (vertical, PHYTEC order no.: VM273)

phyCAM-S/S+ Connector

Suitable cables:

Length

Cable type

PHYTEC order no.

200 mm

Wires

WK262-0.2

200 mm

CAT5

WK353-0.2

500 mm

CAT5

WK353-0.5

500 mm

USB3.0

WK431-0.5

Suitable counterpart for cable mounting:

  • Hirose DF13-8S-1.25C (single row socket)
  • Hirose DF13-2630SCFA (crimping contact for AWG 26...30)

phyCAM-S Cable Socket

phyCAM-S Cable Socket

Please note that twisted-pair wires are strongly recommended for the differential pairs of the LVDS signal lines. The cable impedance should be 100 Ω.

CAT-5 or CAT-7 cables or cable types with USB 3.0 quality are used for external cabling and in the PHYTEC development kits. These are equipped with Hirose connectors on the camera side and RJ-45 (8P8C) connectors on the carrier or application board side.

phyCAM-S/S+ Interface Pin Assignment

phyCAM-S/S+ Electrical Interface Camera Module

Pin

Signal

Signal Type[2]

Signal Level

Function

1

LVDS_DATA_P

O

-

LVDS Data Lane, positive

2

LVDS_DATA_N

O

-

LVDS Data Lane, negative

3

LVDS_MCLK_N

I

-

LVDS Masterclock Lane, negative

4

I2C_SDA

OD-BI

3.3 V

I²C-Interface, SDA-Line

5

I2C_SCL

OD-BI

3.3 V

I²C-Interface, SCL-Line

6

LVDS_MCLK_P

I

-

LVDS Masterclock Lane, positive

7

VCAM

PWR_IN

3.3 V

Power Supply Input

8

GND

-

0 V

Ground

2.

Signal direction from the camera's point of view.

PHYTEC carrier boards partly use an RJ-45 socket for the connection of phyCAM-S camera modules. The assignment of the RJ-45 socket is identical to the Hirose connector.

Notes

  • The supply voltage must be provided by the carrier board. During a power cycle, the supply voltage should be completely discharged to ensure correct operation of the camera module. In the case of long camera cables, the voltage drop across the cable must be taken into account.
  • LVDS DATA: Pixel data and sync signals as LVDS data stream from the camera. The data must usually be parallelized on the application board or the controller module. 
  • LVDS CLOCK: Master clock to camera as LVDS signal. A corresponding LVDS driver module must be provided on the carrier board. See Specifications for a reference design.
  • SCL/SDA: I²C interface for parameterizing the camera and any additional functions that may be available. The camera behaves as an I²C slave. The I²C bus works with a voltage of 3.3V. The pull-up resistors are provided on the basic/application board.
    If longer camera cables are used, the pull-up resistors must be carefully sized so that the bus functions correctly. When using I²C drivers or I²C level shifters on the carrier board, the switching thresholds of the components must be taken into account.
  • PHYTEC carrier boards partly use an RJ-45 socket for the connection of phyCAM-S camera modules. The assignment of the RJ45 socket is identical to the Hirose connector.

Data Format on the LVDS Line

The image data is supplied by the camera as a 10-bit wide data stream, with 8 bits representing the pixel data and 2 bits supplying the synchronous signals Line Valid and Frame Valid.

Data Bit LVDS

Function

C0

Deserializer Sync

D0

Image Data D0

D1

Image Data D1

D2

Image Data D2

D3

Image Data D3

D4

Image Data D4

D5

Image Data D5

D6

Image Data D6

D7

Image Data D7

D8

Line Valid (LV)

D9

Frame Valid (FV)

C1

Deserializer Sync

phyCAM-S LVDS Data Bits Assignment

Note

The information contained in the data bits depends on the sensor used. For example, D[0..7] can represent the brightness information per pixel for a monochrome sensor. With a color sensor, the data for RGB color separations can be output sequentially in Bayer Pattern format or as processed data, for example in RGB or YUV (see the specification of the respective camera module).

phyCAM-S Interface Electrical Characteristics

The electrical characteristics of the receiver side (Carrier Board) of the phyCAM-S interface are shown below. Cameras connected to a phyCAM-S receiver should match these parameters.


Symbol

Min.

Typ.

Max.

Unit

DC Electrical Characteristics (Camera Module)

Supply Voltage

VCAM

3.0

3.3

3.6

V

Supply Current

ICAM

-

200

500

mA

Input HIGH Voltage

VIH

VCAM*0.7

-

VCAM+0.3

V

Input LOW Voltage

VIL

-0.3

-

VCAM*0.3

V

Output HIGH Voltage

VOH

VCAM*0.7

VCAM

-

V

Output LOW Current

IOL

-

3

-

mA

AC Electrical Characteristics (Camera Module)

Master Clock Frequency

fMCLK

-

-

200

MHz

Magnitude of differential input voltage

|VID|

100

-

600

mV

Impedance

ZDIFF

-

100

-

W

AC Electrical Characteristics (Application Board)

Pixel Clock Frequency (phyCAM-S)

fPCLK

16

-

40

MHz

Pixel Clock Frequency (phyCAM-S+)

fPCLK

20

-

80

MHz

Ratio of Reference Clock to Pixel Clock

RREF/PCLK

0.95

1

1.05

-

Magnitude of differential input voltage

|VID|

50

15

-

mV

Electrical Termination

RT

-

100

-

W

Timing Characteristics

I²C-Bus Frequency

fSCL

-

100

400

kHz

phyCAM-S Interface Electrical Characteristics

Important!

  • The pixel clock (fPCLK) must be applied continuously. This means that the pixel clock must not have any drop-outs. This is necessary so that the deserializer can synchronize to the LVDS data stream.
  • When phyCAM-S/S+ modules are switched on, the supply voltage must increase monotonously (no dropouts). Otherwise, it is possible that the internal reset circuits of the camera module do not work correctly. This may result in the camera not outputting an image signal.

phyCAM-S / phyCAM-S+ Compatibility

The phyCAM-S+ interface is a further development of the phyCAM-S interface with regard to the possible clock frequency. The phyCAM-S+ interface can transmit camera signals with a pixel clock (fPCLK) up to 80 MHz. It is largely compatible with the phyCAM-S interface.

phyCAM-S cameras can be connected to a microcontroller module with phyCAM-S+ interface, provided that the minimum pixel clock (fPCLK) is not less than 20 MHz. Camera modules with phyCAM-S+ specification can be connected to a microcontroller module with phyCAM-S interface if the maximum pixel clock (fPCLK) of 40 MHz is not exceeded.

phyCAM-M Interface Specification

Characteristics of the interface:

  • MIPI CSI-2 data interface (4 Lanes D-PHY)
  • The camera is configured via an I²C interface.
  • Connector: 30-pin shielded FFC connector 0.5 mm pitch, 0.3 mm cable thickness
  • Operating and signal voltage level of I²C interface: 3.3 V
  • Recommended maximum cable length: up to 15 cm (the maximum length depends on the data rate used)

Interface signals:

  • Power supply (3.3 V / 5 V)
  • MIPI CSI-2 (4 Lanes D-PHY)
  • I²C-Bus for camera configuration and if necessary special functions (depending on camera module)
  • Control cables (Reset, Voltage Select)
  • feature pins for special functions of the camera e.g. trigger and strobe

Connector

Connector: 30 pin shielded FFC connector 0.5 mm pitch, 0.3 mm cable thickness, bottom contacting.

Suitable connectors for application board:

  • Hirose FH48-30S-0.5SV (vertical, PHYTEC order no.: VE560)
  • Hirose FH41-30S-0.5SH (horizontal, PHYTEC order no.: VE554)

phyCAM-M Connector

phyCAM-M Connector

Suitable cables:

Length

Cable type

Contacts position

PHYTEC order no.

150 mm

Shielded FFC

equilateral

WF271

phyCAM-M Interface Pin Assignment

Pin assignment on camera side:

Pin

Signal

Signal Type[2]

Signal Level

Function

1



VCAM





PWR_IN





3.3 V / 5 V




Power Supply Input
Voltage depends on VCC_SELECT

2

3

4

GND

-

0 V

Ground


5


VCC_SELECT


O


-

Defines voltage on VCAM Pins
Open: VCAM = 3.3 V
GND: VCAM = 5 V

6

nRESET

I

3.3 V

Reset in (active low)

7

I2C_ADDR

I

3.3 V

I²C Address Select

8

I2C_SDA

OD-BI

3.3 V

I²C SDA-Line

9

I2C_SCL

OD-BI

3.3 V

I²C SCL-Line

10

GND

-

0 V

Ground

11

CTRL1

I/O

3.3 V

Multipurpose Pin 1 (Default: Strobe Output)

12

CTRL2

I/O

3.3 V

Multipurpose Pin 2 (Default: Trigger Input)

13

CTRL3

I/O

3.3 V

Multipurpose Pin 3

14

CTRL4

I/O

3.3 V

Multipurpose Pin 4

15

GND

-

0 V

Ground

16

CSI_D3N

O

-

MIPI CSI-2 Data Lane 3, negative

17

CSI_D3P

O

-

MIPI CSI-2 Data Lane 3, positive

18

GND

-

0 V

Ground

19

CSI_D2N

O

-

MIPI CSI-2 Data Lane 2, negative

20

CSI_D2P

O

-

MIPI CSI-2 Data Lane 2, positive

21

GND

-

0 V

Ground

22

CSI_CLK0N

O

-

MIPI CSI-2 Clock Lane, negative

23

CSI_CLK0P

O

-

MIPI CSI-2 Clock Lane, positive

24

GND

-

0 V

Ground

25

CSI_D1N

O

-

MIPI CSI-2 Data Lane 1, negative

26

CSI_D1P

O

-

MIPI CSI-2 Data Lane 1, positive

27

GND

-

0 V

Ground

28

CSI_D0N

O

-

MIPI CSI-2 Data Lane 0, negative

29

CSI_D0P

O

-

MIPI CSI-2 Data Lane 0, positive

30

GND

-

0 V

Ground

phyCAM-M  -  Electrical Interface Camera Module

2.

Signal direction from the camera's point of view.

Notes

  • The supply voltage must be provided by the carrier board. During a power cycle, the supply voltage should be completely discharged to ensure the correct operation of the camera module.
  • I2C_SDA/I2C_SCL: I²C interface for configuring the camera and any additional functions that may be available. The camera behaves as an I²C slave. The I²C bus operates with a voltage of 3.3V. The pull-up resistors must be provided on the application board.
  • CTRLx/VCC_SELCT/nRESET/I2C_ADDR: The signal level is 3.3 V. Inputs are high-impedance (High-Z), outputs are mainly open-drain, and require a pull-up resistor on the application board.
  • nRESET: The reset signal must be kept LOW during a power cycle. Camera-Modules has no Pull-Up.

phyCAM-M Interface Electrical Characteristics

The general characteristics of the phyCAM-M interface on the receiver side (baseboard) are shown below. Explicit information on the individual camera modules can be found in the respective hardware manuals.

 

Symbol

min.

typ.

max.

Unit

DC Electrical Characteristics

Supply Voltage (VCC_SELECT = open)

VCAM

3.0

3.3

3.6

V

Supply Voltage (VCC_SELECT = GND)

VCAM

4.5

5

5.5

V

Supply Current

ICAM

-

0.2

1.5

A

Input HIGH Voltage

VIH

-

3.3

-

V

Input LOW Voltage

VIL

-

0

-

V

Output HIGH Voltage

VOH

-

3.3

-

V

Output LOW Current

IOL

-

10

-

mA

Timing Characteristics

VCAM to nRESET

tVRST

500

-

-

µs

I2C_SCL Frequency

fSCL

-

100

400

kHz

phyCAM-M Interface General Electrica Characteristics

Warning

When phyCAM-M modules are switched on, the supply voltage must increase monotonously (no dropouts). Otherwise, it is possible that the internal reset circuits of the camera module will not work correctly and could lead to malfunctions of the camera module.

phyCAM-L Interface Specification

Characteristics of the interface:

  • FPD-Link III data interface (with up to 4.16 Gbps coax)
  • The camera is parameterized via an I²C interface which is transparently transmitted via FPD-Link III
  • Connector: UMCC Gen. 1
  • Power over Coax (PoC)
  • Recommended maximum cable length: up to 15 m (the maximum length depends on the cable and the load on the PoC)

Interface signals:

  • FPD-Link III with PoC and bidirektional communication

Connector

Connector: UMCC Gen. 1 or compatible

Connector phyCAM-L

Suitable connectors for application board:

  • TE 2337019 or compatible (PHYTEC order no.: VE611)

Suitable cables:

Length

Cable type

Contacts position

PHYTEC order no.

15 m

Coax

-

TBD

7.5 mCoax-TBD

phyCAM-L Cable

phyCAM-L Interface Pin Assignment

Pin assignment on camera side:

phyCAM-L  -  Electrical Interface Camera Module

Pin

Signal

Signal Type

Signal Level

Function

1

Link

IO

-

FPD-Link III

2

GND

-

0 V

Ground

phyCAM-L  -  Electrical Interface Camera Module

Notes

  • The supply voltage must be provided by the carrier board. During a power cycle, the supply voltage should be completely discharged to ensure the correct operation of the camera module.

phyCAM-L Interface Electrical Characteristics

The general characteristics of the phyCAM-L interface are shown below. Explicit information on the individual camera modules can be found in the respective hardware manuals.

 

Symbol

min.

typ.

max.

Unit

PoC Characteristics

Supply Voltage

VPoC

4.5

-

13.2

V

Supply Current

IPoC

-

-

0.75

A

Power transmissionPPoC--6W

CML Treiber

FPD-Link III output voltage

VFPD

-0.3-1.21

V

FPD-Link III Link Frequenz

fFPD

3.6844.16

Gbps

phyCAM-L Interface General Electrica Characteristics

Warning

When phyCAM-L modules are switched on, the supply voltage must increase monotonously (no dropouts). Otherwise, it is possible that the internal reset circuits of the camera module will not work correctly and could lead to malfunctions of the camera module.

Trigger/Strobe Connector Specifications

Main Characteristics:

  • 3 pin receptacle. Mating connector: JST SHR-03V-S-B
  • Signal level on this connector depends on the specific camera module.

Interface signals:

  • Trigger
  • Strobe / Sync

Connectors and Cables

Matching PCB-Headers for custom application boards:

  • JST BM03B-SRSS-TB(LF) (SN) (vertical, PHYTEC Order No.: VM210)
  • JST SM03B-SRSS-TB(LF) (SN) (horizontal, PHYTEC Order No.: VM298)

Matching cables:

Length

Cable Type

PHYTEC order no.

250 mm

Wires

WK295

30 mm

Wires

WK295-0.03

Suitable connector housings for cable mounting:

  • JST SHR-03V-S-B (contact housing)
  • JST SSH-003T-P0.2 (contacts for AWG 32 ... 28)
phyCAM-Trigger/Strobe Header

Pin

Signal

Signal Type[2]

Signal Level

Function

1

CAM_TRIG

I

Trigger (optional - see Camera Description, internal 10 kΩ PD-Resistor)

2

GND

-

0 V

Ground

3

CAM_STRO

O

-7

Strobe (optional - see Camera Description)

Trigger/Strobe Connector – Pin Assignment

2.

Signal direction from the camera's point of view.

3.

Signal voltage at this pin depends on the respective camera module.

Mechanical Specifications

Tolerances:

PCB Dimensions±0.25 mm
Drill Holes±0.1 mm
Plastic Components±0.5 mm

All information is subject to change.

Camer PCB Dimensions

phyCAM Printed Circuit Board (PCB) Dimensions

phyCAM Printed Circuit Board (PCB) Dimensions

Cable outlet to the top in relation to sensor standard readout direction.

Around the outer mounting holes there is a round, metalized area with d=5mm, on which screws or mounting elements can rest. For the inner holes, this contact area is d=4 mm and is not metalized.

If fastening elements are to project beyond this area, insulating materials must be used to ensure that short circuits between conductor tracks cannot occur. In this case, please also note the positions of components depending on the model variant.

The inner fixing holes (2.2 mm or 2.6 mm) can be supplied with a light-tight cover. In this case, make sure that the plugs used protrude approx. 3 mm on the sensor side.

The connector for strobe/trigger signals has a height of 4.9 mm (for camera modules with this function).

Note

Since lenses invert the image position, the board is usually mounted with the cable outlet down to maintain an upright image. The readout direction of many cameras can be reversed by software so that a different mounting direction is also possible.

C/CS-Mount Lens Holder Dimensions

Camera modules with a C/CS-mount lens holder are denoted by the suffix –H in the PHYTEC part number.

The holder has an adjustable brass insert for fine adjustment of the lens support dimension. The insert can be fixed with a grub screw. For C-mount lenses, an additional corresponding adapter ring screwed on. (PHYTEC part #: AZ008).

One side of the holder is provided with threaded holes for mounting. The mounting can be done with screws 4 x M2.5 or with a 1/4" photo thread.

The standard cable outlet is in the direction of the mounting holes. The sensor board can be turned in 90° steps so that the mounting is possible from each side.

Lens Holder Material:  Polyoxymethylene (POM, Delrin), Black
C/CS Mount Threat Insert Ring:  Brass

phyCAM with C/CS-Mount Lens Holder Dimensions

M12 Lens Holder Dimensions

Camera modules with a lens holder for M12 / 0.5 lenses (S-Mount) are denoted by the suffix –M12 in the PHYTEC part number.
The holder is screwed to the camera module using 2 mm screws (inner 2.2 mm or 2.6 mm holes).

phyCAM Dimensions with M12 lens holder

phyCAM with M12 Lens Holder Dimensions

The camera modules of the VM-012 series are an exception. Due to the ensorgeometry, different holders and screws are used for these cameras. The holder is screwed to the
camera module using 1.8 mm screws (inner 2.2 mm holes).

M12 lens holder Dimensions for VM-012 series

M12 Lens Holder Dimensions for VM-012 Series

All camera modules can be mounted using the four 2.7 mm holes on the PCB (suitable screw size 2.5 mm).

Design-In Guide

phyCAM-P

Design Considerations

The phyCAM-P interface is designed for the simplest possible interface design. It, therefore, offers the developer the freedom to optimize the connection to the microcontroller either with regard to costs or compatibility and scalability. The respective degree of optimization can be determined by the developer.

phyCAM-P

Cost-optimized design

Compatible design

Power supply

Fixed power supply according to the camera model that is used

Variable power supply controlled by interface pin 31

Signal lines

Level shifter is only required if the signal level of target hardware application board differs from that of the camera module

Level shifter is always required

I²C-Interface

Level shifter is only required if the signal level of target hardware application board differs from that of the camera module

Level shifter is always required

Feature-pins (CAM_CTRL_1/2)

No limitations, features of the camera can be used according to application

Features may vary between different camera modules. Add jumpers for different options.

phyCAM-P Design Considerations 

  1. Power Supply

    The supply voltage of various phyCAM-P camera types can differ. If a carrier board is to support several camera types, the supply voltage must be able to adapt to the connected model. This can be achieved by using a separate voltage regulator. The voltage regulator can automatically be set to the correct value via the resistance value of pin 31 of the camera (see reference circuit diagram).

    If only a certain camera type is considered, a separate regulator may not be required and the camera may be powered from an existing voltage source.

  2. Signal Level

    Depending on the supply voltage, the levels of the signal lines (data, control lines, and I²C bus) can also differ for different camera types. In a universal circuit design, these signals must therefore always be routed through level shifters, which translate the levels on the camera side to the value of VCAM.

    If, on the other hand, the carrier board is only designed for a certain camera type, level adjustment by level shifters is only necessary if the levels of the controller (or other circuitry of the carrier board) and the camera are different.

  3. Camera Features Usage

    The various camera modules of the phyCAM-P series offer different additional functions either on the camera module itself or via the CAM_CTRL pins of the phyCAM-P connector. These functions may differ from camera to camera. The function of the CAM_CTRL pins changes accordingly.

    If you specify a specific camera type, all special functions of the camera can be used. For a flexible design, we recommend using as few special functions as possible. This way, you minimize the risk that later camera modules, which do not have a function that you use, do not function on your baseboard.

    If necessary, the polarity or qualification of a signal may be different (edge/state-controlled). We recommend that you connect the CAM_CTRL pins to your design using (solder) jumpers. If you do not need the pins, you should provide the following jumpers:

    • CAM_CTRL_1: Jumper against GND/VCAM
    • CAM_CTRL_2: Jumper to GND

    Compatibility of the individual phyCAM-P modules with their respective standard equipment:


VM-006

VM-008

VM-009

VM-010

VM-011

VM-012

VM-016

VM-05x

Special Features

Address Select

n/a

n/a

CTRL1

CTRL1

CTRL1

CTRL1

CTRL1

CTRL1

Trigger

CTRL1

n/a

n/a

CTRL2

CTRL2

CTRL2

CTRL2

CTRL2

Strobe / Sync

n/a

n/a

CTRL1

CTRL1

CTRL1

CTRL1

CTRL1

CTRL1

Standby

n/a

n/a

CTRL2

CTRL2

CTRL2[4]

n/a

n/a

n/a

Ext. Data word width D1

n/a

n/a

n/a

n/a

CTRL2

n/a

CTRL2

CTRL2

Ext. Data word width D0

n/a

n/a

n/a

n/a

CTRL1

n/a

CTRL1

CTRL1

Ground

CTRL2

CTRL2

CTRL2

CTRL2

CTRL2

CTRL2

CTRL2

CTRL2

Control Pins

Reset

nRST

nRST

nRST

nRST

nRST

nRST

nRST

nRST

Output Enable

OE

n/a

OE

OE

OE

n/a

OE

OE

Compatibility between phyCAM-P Modules (Default Configuration)

4.

Active low

Power Cycle

Complex integrated circuits, such as those present in image sensors, always require a defined power-on and power-off sequencing. The supply voltage must rise monotonously when the camera module is switched on.

phyCAM-P Power Cycle

phyCAM-P Power Cycle

Timing Characteristics

Symbol

min.

typ.

max.

Unit

VCAM to Reset Delay

t1

-

500

-

µs

VCAM Power-On Delay[5]

t2

-

100

-

ms

phyCAM-P Power Cycle Timing Characteristics

5.

Delay depends on the strength of the discharge of the network.

phyCAM-P Reference Design

A capacitance of ≥ 100 µF must be placed on the power supply pins (VCAM). In addition, 2x 100 nF and 2x 100 pF must be provided. In general, capacitors with low capacitance should be selected so that the resonant frequency corresponds to the operating frequency of the camera module. Ripple and high-frequency interference on the output voltage can become visible in the recorded image. A ferrite can help to block these interferences for the supply voltage of the camera module. Depending on the cable used, it may be necessary to mirror the pin assignment of the phyCAM-P connector in the circuit diagram. This is the case when an equilateral contacting cable is used.

phyCAM-P Low BOM Cost Example Design

In this example, the power supply of the camera module (VCC_CAM0_P) is provided by the power source, the remaining logic of the application board (VCC_LOGIC). This eliminates the need to adjust the signal voltages. The reset is enabled via a fixed delay using an RC element (R57, C116). Alternatively, the reset can also be controlled via a global reset signal from the application board.

The CAM_CTRL1 and CAM_CTRL2 control lines are designed so that they can be used as ground, trigger, strobe, or data signals. Depending on the equipment of the camera module, J7 and J8 must be equipped or left open and the CAM_CTRL1 or CAM_CTRL2 lines must be routed to the controller.

The pull-up resistors for the I²C bus must be provided on the application board.

phyCAM-P Reference Circuit Diagram for Low BOM Costs

phyCAM-P Low BOM Cost Reference Circuit Diagram

phyCAM-P Highest Compatibility Example Design

This section presents a design draft that ensures high compatibility between different phyCAM-P modules. In this example, the voltages VCC_CAM0_P and VCC_LOGIC can either be the same or different.

The power supply is based on a step-down voltage regulator (U11) with configurable output voltage. The feedback branch's footprint is connected to the VCC_SELECT resistor of the camera module. The circuitry of the feedback branch is designed for output voltages (VCAM) of 2.8 V to 3.3 V with a feedback reference voltage of 800 mV. By adapting the R50-52 resistors, the circuit can also be adapted to a voltage regulator with a different feedback voltage.

Please refer to the manufacturer's datasheet for the dimensioning and layout of the switching regulator. Ripple and high-frequency interference on the output voltage can become visible in the recorded image. Ferrites (L19, L21, L22) can help to block these interferences for the supply voltage of the camera module.

The level shifters U10, U12, and U13 are used to adjust the voltage of the signals between the controller interface (VCC_LOGIC) and the camera module (VCC_CAM0_P).

A series termination (RN7-9, R54-56) of the output signals is useful to ensure good signal integrity. The serial termination was divided into individual resistors and resistor networks for layout reasons.

The T filter (R53, C110, L17) at the output of U13 should be adapted to the master clock frequency used. In addition, many phyCAM modules offer the possibility of equipping an oscillator, so that U13 with its circuitry can be completely omitted.

When dimensioning the I2C pull-up resistors (R46, R47), the maximum permissible current ( output LOW current) must be observed. The pull-up resistors on the controller side must be selected according to the requirements of the application board.

The ferrites L20, L23, and L24 can be omitted depending on the voltage concept of the application board.

Note

Bidirectional level shifters such as U12 usually operate with different switching thresholds for input and output. This can lead to malfunction, especially if several level shifters are used on the same bus.

Always observe the design notes of the respective datasheet and ensure that the switching thresholds of the I²C standard are not violated.

phyCAM-P Reference Circuit Diagram for Highest Compatibility

phyCAM-P Highest Compatibility Reference Circuit Diagram

phyCAM-S+

Design Considerations

Since the phyCAM-S/S+ interface is designed for a high level of compatibility between the camera modules, the different signal voltages on the interface side required for phyCAM-P design are not required.

Two typical phyCAM-S application scenarios can be distinguished:

  • Camera inside the housing: A possibly movable camera is built into a closed housing.
  • Remote camera head: Camera module and application board are spatially separated.

 Depending on the installation situation, various aspects have to be taken into account:

phyCAM-S/S+

Camera Inside Housing

Remote Camera Head

Power Supply

Fixed Supply Voltage

Observe voltage drop via cable.
Provide short-circuit-proof supply voltage if necessary.

Shielding Concept

Avoid Emitting Interference

Avoid emitting interference
Derive interference couplings

phyCAM-S/S+ Design Considerations

  1. Power Supply
    The supply voltage of phyCAM-S/S+ is 3.3 V. The I²C interface is also operated with this voltage. If the camera module is used as a remote camera head, the voltage drop across the cable used must also be taken into account. A short-circuit-proof voltage source can also be provided to ensure the functional reliability of such a system design.

  2. Shielding Concept
    Generally, valid statements on the ideal shielding concept of a system are difficult to make. In principle, the effort involved depends on the standard to be applied. In the case of device internal components, the line-bound interference coupling and ESD discharge test are generally omitted. The cable shield should then be connected to Ground. In the case of remote camera modules, it must be increasingly taken into account in the design draft how introduced interference can be dissipated without causing interference or even system failure.

Power Cycle

Complex integrated circuits, such as those present in image sensors, always require a defined power-on and power-off sequencing. The supply voltage must rise steadily when the camera module is switched on.

phyCAM-S/S+ Power Cycle

Timing Characteristics

Symbol

min.

typ.

max.

Unit

VCAM Power-On Delay[5]

t2

-

100

-

ms

phyCAM-S/S+ Power Cycle Timing Characteristics

5.

Delay depends on the strength of the discharge of the network.

This power cycle controls the on-board reset of a phyCAM-S camera module so that individual components cannot be reset without a correct power cycle.

General Design Requirements

A capacitance of ≈ 100 µF must be placed on the power supply pins (VCAM). In addition, at least 1x 100 nF and 1x 100 pF must be provided. In general, capacitors with low capacitance should be selected so that the resonant frequency corresponds to the operating frequency of the camera module.

Ripple and high-frequency interference on the output voltage can become visible in the recorded image. Ferrites (L19, L21, L22) can help to block these interferences for the supply voltage of the camera module.

On many camera modules, an oscillator can be fitted so that a necessary LVDS driver (see phyCAM-S/S+ Camera Module Inside the Housing Reference Circuit Diagram) with its circuitry can be completely omitted. If this component placement option is used, the cables should be pulled to operating ground and not left with a high impedance or open.

The LVDS signal lines should be routed symmetrically (line skew ≤ 127 µm) and with ground as reference plane (Z0 = 50 ≤, ZDIFF = 100 ≤). Avoid vias.

Note

The reference circuit diagrams are designed for any controller with a parallel camera interface. The LVDS transmission technology used for the phyCAM-S/S+ interface offers a number of advantages.

However, it should be noted that high frequencies (≥ 12x fPCLK) are generated by the serial transmission of the data. Due to these frequencies, careful design is, therefore, essential to achieve optimum signal quality and transmission characteristics. This applies, in particular, to transmissions with high resolution or frame rates.

phyCAM-S/S+ Housing Internal Camera Modules Example Design

This section shows a design draft for the internal use of a camera module.

Three active components (U1, U3, U6) are required for a complete phyCAM-S/S+ interface. Almost all controller modules of the phyCARD and phyFLEX series already have a camera interface with LVDS interface, so that the LVDS deserializer (U1) with its circuitry can be omitted. For controller modules of the phyCORE series, on the other hand, U1 must always be provided.

U6 converts the master clock (MCLK) generated by the controller module into an LVDS signal. The filter circuits of the LVDS-MCLK signal (R24, R25, R37, R38, and C67) block harmonics of the MCLK signal. L14 and L8 additionally symmetrize the LVDS signal, which improves signal integrity and suppresses common-mode noise. If an oscillator is mounted on the camera module, U6 with all its circuitry is omitted. These Common Mode Chokes should always be placed as close as possible to the phyCAM-S connector.

U3 decouples the capacitive bus load between the camera module/cable and the application board. Depending on the bus capacity available in the system, U3 can be omitted.

Note

Bidirectional level shifters such as U12 usually operate with different switching thresholds for input and output. This can lead to malfunction, especially if several level shifters are used on the same bus. Always observe the design notes of the respective datasheet and ensure that the switching thresholds of the I²C standard are not violated.

A 3.3 V voltage source is sufficient to supply the camera with power. The current carrying capacity should be ≥ 500 mA. A ferrite (L11) can help to block these disturbances for the supply voltage of the camera module. The ferrites L26-28 can be omitted depending on the voltage concept of the application board.

We recommend the use of surge protection diodes (D1, D4) in the signal lines of the camera. The protective diodes for the LVDS signals should have a contact capacitance of ≤ 600fF in order not to influence the LVDS signals.

The appropriate cable quality depends on the cable length, the clock frequency of the pixel clock (fPCLK), and the requirements of the application. For example, cables of type CAT-5e, CAT-7 ("Ethernet cable"), or cables with specifications for USB 3.0 can be used. Especially at high transmission frequencies, cables equipped with an integrated drain wire per LVDS wire pair can be inexpensive.
The drain wire helps to reduce the radiation of common-mode interference. For this purpose, it must be connected to the screen/ground system at the respective cable end.

Finally, the design of the transmission path and the signal quality should be verified:

  • Recording and checking the eye diagrams of LVDS data and LVDS MCLK signal
  • Measurement of the signal integrity of the unbalanced (TTL) MCLK signal on the LVDS converter module. If necessary, the signal must be optimized by line termination.

phyCAM-S/S+ Camera Module Inside the Housing Reference Circuit Diagram

phyCAM-S/S+ Remote Camera Modules Example Design

This use case is similar to the scenario described in the last section, but here the camera should not be placed in the device housing, rather it should be possible to connect it externally via a cable.

The connector now has two additional connections. One connector is connected to operating Ground (GND), the second connects SHIELD_CAM0 to GND via an RC combination (R63, C155). In this simple example, the (outer) cable shield is designed as a "pigtail". Alternatively, a fully shielded connector, e.g. RJ45, can be used, or the shield can be divided into several connections.

phyCAM-S/S+ Camera Module Inside the Housing Reference Circuit Diagram shows a correspondingly extended circuit design. The basic circuit from phyCAM-S/S+ Camera Module Inside the Housing Reference Circuit Diagram only needs to be changed slightly.

phyCAM-S/S+ Remote Camera Module Reference Circuit Diagram

phyCAM-M

Design Considerations

Similar to phyCAM P, the phyCAM-M interface is designed for the simplest possible interface design, but with a degree of standardization similar to that of phyCAM-S. It therefore currently offers the developer the greatest possible freedom to optimize the connection to the microcontroller with regard to BOM costs or to maintain compatibility and scalability. The degree of optimization can be determined by the user.

phyCAM-M

Cost-optimized Design

Compatible Design

Power Supply

Fixed voltage according to the selected camera

Switchable voltage by means of VCC_SELECT (Pin 5)

Multipurpose-Pins (CTRLx)

Use according to application and selected camera

Keep in mind that camera features can be different. Provide jumpers if necessary.

phyCAM-M Design Draft Overview

  1. Power Supply
    The supply voltage VCAM can be different for various camera modules (see individual description of the camera modules). A switchable power supply must be available on a carrier board that supports any phyCAM modules. The required voltage can be detected by the carrier board via the state of pin 5 (high-impedance or ground) and the voltage source can be switched automatically (see phyCAM-M Reference Schematic). If only one specific camera module is considered, the camera can be powered directly from an existing power source.

  2. Multipurpose-Pins (CTRLx)
    The various camera modules of the phyCAM-M series offer a variety of additional functions either on the camera module itself or via the CTRLx pins of the phyCAM-M connector. These functions can differ from camera to camera. The function of the CTRLx pins changes accordingly.

    If you select a specific camera module, all special functions of the camera can be used. For a flexible design, we recommend using as few special functions as possible. This minimizes the risk that later camera modules will not have a function that you use and therefore will not function on your application board. If necessary, the polarity or qualification of a signal may be different (edge/state controlled). We recommend connecting the CTRLx pins to GPIOs of your design via pullup resistors. If you do not need the pins, you can leave the pins unconnected.

Note

You may need to adapt your software to different camera functions.

The compatibility of the individual phyCAM-P modules with the respective standard equipment:


VM-016

Special Features

Trigger

CTRL2

Strobe / Sync

CTRL1

Shutter

CTRL3

Standby

n/a

phyCAM-M Module Compatibility (Default Configuration)

Power Cycle

Complex integrated circuits, such as those present in image sensors, always require a defined power-on and power-off sequencing. The supply voltage must rise steadily when the camera module is switched on.

phyCAM-M Power Cycle

phyCAM-M Power Cycle

Timing Characteristics

Symbol

min.

typ.

max.

Unit

VCAM to Reset Delay

t1

500

-

-

µs

VCAM Power-On Delay[5]

t2

-

100

-

ms

Reset durationt3500--µs
On MUdul Reset Delayt4-15-ms

phyCAM-M Power Cycle Timing Characteristics

5.

Delay depends on the strength of the discharge of the network.

General Design Requirements

A capacitance of ≈ 100 µF must be placed on the power supply pins (VCAM). In addition, 1x 100 nF and 1x 100 pF must be provided. In general, capacitors with low capacitance should be selected so that the resonant frequencies correspond to the operating frequencies of the camera module.

Ripple and high-frequency interference on the output voltage can become visible in the recorded image. A ferrite can help to block these interferences for the supply voltage of the camera module.

Depending on the cable used, it may be necessary to mirror the pin assignment of the phyCAM-M connector in the circuit diagram. This is the case when an equilateral contacting cable is used.

The differential CSI-2 signal lines should be routed symmetrically (line skew ≤ 150 µm) and with ground as the reference plane (Z0 = 50 Ω, ZDIFF = 100 ≤). The data-to-clock line skew should be ≤ 1500 µm. Avoid vias.

It should be noted that about a third of these length differences have already been used on the controller and the camera module. Please read in the hardware manual of the used module for the length and skew that is specified there.

The maximum line length of the bus should be approx. 30 cm. The lengths on the controller and camera module must be noticed.

phyCAM-M Example Design

This section introduces the typical design draft for the phyCAM-M interface.

The power supply of the camera module (VCC_CAM_M) is controlled by VCC_SELECT from two switchable voltage sources (U17, U18). For a defined power sequencing, a discharge branch of the camera supply voltage (Q2, R81) is added to the circuit. In this example, VCC_3V3 is first activated and controlled via PWRGOOD_VCC_3V3 to connect the remaining voltage networks of the application board. As long as PWRGOOD_VCC_3V3 is kept LOW, VCC_CAM_M is discharged via Q2 and R81.

CAM_nRESET is permanently controlled via an RC combination (R84, C160, C163). D7 is used to discharge the grid in the case of a power cycle. Alternatively, a global reset signal from the application board can also be used.

The pull-up resistors for the I²C bus must be placed on the application board. An adaptation of the signal voltage is only necessary if the supply voltage of the logic (VCC_LOGIC) deviates from 3.3 V. The signal voltage of the I²C bus has to be adjusted by means of the pullup resistors.

Pull-up resistors are provided at the multipurpose pins CTRLx as these are always designed as open-drain when they are provided as outputs on the camera module. This enables a very simple adaptation of the signal voltage to the supply voltage of the logic on the application board.

The resistor networks (RN13-17) serve as placeholders for any common-mode chokes that may be required. As a rule, it is sufficient to pay attention to the symmetrical and impedance-controlled conductor routing with ground as a reference layer.

phyCAM-M Reference Schematic

phyCAM-M Reference Schematic

phyCAM-L

Design Considerations

The phyCAM‑L interface is based on the SerDes combination DS90UB953 and DS90UB954. Please note the TI layout guidelines when designing such a system on your baseboard.

Overview Design Considerations phyCAM-L

  1. Power Supply
    1. The supply voltage VPoC can be selected between 4.5 and 13.2 volts. Depending on the power consumption of the connected camera, it is not possible to select a low supply voltage, because a current flow of 750 mA must not be exceeded (see the detailed description of the camera modules). In particular, if further power is required at the camera head, e.g. to use lighting a higher voltage is advantageous. A voltage of 12 volts should therefore be selected on a baseboard that supports any phyCAM module.
  2. Image data
    1. The phyCAM-L interface is converted to a MIPI CSI-2 interface using the DS90UB954. The number of lanes can be freely selected. The data throughput of the camera module used must be taken into account. For a complete phyCAM-L interface 4 lanes and a clock lane are required.
  3. Reference Clock
    1. The reference clock can be selected between 23 and 26 MHz. It should be noted that by varying the clock, all clock rates derived from it change. This usually also includes the master clock of the camera module used.
  4. Control signale / GPIOs
    1. Four control signals are required for complete phyCAM-L compatibility. Depending on the camera module or the required range of functions, these can be omitted. The GPIOs must be configured correctly before they can be used (datasheet DS90UB954 / DS90UB952).
      1. NameGPIO#Directionpreferred function
        CTRL1GPIO0OutputStrobe
        CTRL2GPIO2InputTrigger
        CTRL3GPIO1Output
        CTRL4GPIO3InputReset of the Camera module
  5. I2C
    1. The I2C bus is required to configure the DS90UB954.As soon as this has been correctly configured, the I2C bus is transparently passed through to the camera module.However, the effective data bandwidth is reduced by approx. 60%.This should be taken into account when the bus is very busy.For more details, please refer to the datasheet DS90UB954.
  6. Optional signals
    1. The LOCK and PASS signals can be monitored and in the event of an error trigger, an interrupt directly.Alternatively, these signals can also be queried via I2C.For more details, please refer to the datasheet DS90UB954.

Compatibility of the individual phyCAM-L modules with their respective standard equipment:


VM-017

Special Features

Trigger

CTRL2

Strobe / Sync

CTRL1

Shutter

CTRL3

Standby

n/a

ResetCTRL4

Compatibility between phyCAM-L modules (standard equipment)

Power-Cycle

Complex integrated circuits, as found in image sensors, always require a defined power-on and power-off sequencing.The supply voltage must increase monotonously when the camera module is switched on.

Timing Characteristics

Symbol

min.

typ.

max.

Unit

VCC and VPoC Ramp-Up Time

t0->t1-110ms

VCC to VPoC (Basisboard)

t0->t10--ms

VCC to Reset (Basisboard)

t1->t2

500

-

-

µs

Reset (Basisboard) to Reset (CTRL4)t1->t20--ms

On Cameramodul Reset Delay[6]

t2->t3
t6->t7

-10-ms

VPoC Power-On Delay[7]

t4->t5

-

100

-

ms

Reset duration (CTRL4)

t5->t6500--µs

phyCAM-L Power-Cycle Timing Characteristics

phyCAM-L Timing and Power-Cycle

6.

The reset is extended on the camera module.

7.
Required to unload the camera module.

General Design Requirements

A sufficiently strong decoupling must be provided for the PoC power supply (see datasheet DS90UB954). The current flow must be at least 750 mA. Furthermore, a low DCR of the ferrites and chokes used must be ensured so that the voltage fluctuations are as low as possible. The cable used also plays a big factor. The FPD-Link III signal is decoupled from the DC power supply (PoC) by the DC decoupling capacitors. If the voltage fluctuation (ripple/noise) fall/rise within the frequency range Link at a sufficient level, there will be interference on the link. It is recommended not to exceed a maximum swing of the fluctuations of 1.0 V (peak-to-peak), while the maximum edge steepness, in relation to 1.0 volts, is more than 200 µs. The PoC voltage can be measured at the Expansionconnector at the camera module.

The coaxial cable used requires an impedance of 50 ohms. Depending on the cable used, the length can be significantly different.
According to TI, the maximum insertion loss of the transmission link should not exceed 20 dB at 2.1 GHz. As a guide, an RG1.37 cable can be used with approx. 2.54 dB / m and an RG58 with approx. 0.64 dB / m. Connectors with approx. 0.3 dB / m. For exact values, please refer to the datasheet for the used cable. According to TI, the return loss must be at least -10 dB.


The differential MIPI CSI-2 bus should be routed symmetrically (line skew ≤ 150 µm) and with ground as the reference plane (Z0 = 50 Ω, ZDIFF = 100 Ω). The data-to-clock line skew should be ≤ 1500 µm. Vias are to be avoided. It should be noted that approx. one-third of these length differences have already been used up on the controller and the camera module. Please look in the hardware manual of the associated module for the cable length and skew specified there.

The maximum cable length of the MIPI CSI-2 bus should be approx. 30 cm. The lengths on the controller must be observed.

Example Design phyCAM-L

This section presents the typical draft design for the phyCAM-L interface.

The power supply for the camera module is generated via VCC_POC. The capacitors, coils, and ferrites decouple the user data from the power supply.

For a defined power sequencing the circuit has to be extended by a discharge circuit (see phyCAM-M). In this example, + 3V3 and + 1V8 are activated first. VCC_POC is then started up.

If it cannot be ensured that the reset release occurs after the + 1V8 is stable, CAM_nRESET_3V3 can also be delayed via an RC combination (R3, C25). D2 is used to quickly discharge the network in the event of a power cycle.

The SerDes combination work in "synchronous mode". For this, wiring around R6, R7, and R11 is required.

The default I2C address is configured using R4. With R5, R12, and Q1 it is possible to configure an alternative address. The configuration must take place before the reset release. Alternatively, the I2C address can be configured via software.

The AC coupling capacitors C38, C37, C36, and C35 must be of type X7R and have a nominal capacity of 33nF or 15 nF. The recommended dielectric strength is 50 V.


phyCAM-L Reference Schematic

Note

Our products are subject to continuous development. You can find the latest information on our website:

     North America:     www.phytec.com
     International:        www.phytec.eu
     Germany:              www.phytec.de

The PHYTEC team will be happy to advise you on selection and design-in.

Revision History

Date

Version #

Changes in this manual

01.03.2021

Manual L-867Be.A0

New Release